[PATCH 0/2] clock: versal-clk: Fix Versal NET clock binding and switch to CCF

Michal Simek posted 2 patches 1 month ago
.../bindings/clock/xlnx,versal-clk.yaml       |  49 ++-
.../boot/dts/xilinx/versal-net-clk-ccf.dtsi   | 378 ++++++++++++++++++
.../xilinx/versal-net-vn-x-b2197-01-revA.dts  |   3 +-
arch/arm64/boot/dts/xilinx/xlnx-versal-clk.h  | 123 ++++++
.../boot/dts/xilinx/xlnx-versal-net-clk.h     |  78 ++++
.../boot/dts/xilinx/xlnx-versal-net-power.h   |  38 ++
.../boot/dts/xilinx/xlnx-versal-net-resets.h  |  53 +++
.../arm64/boot/dts/xilinx/xlnx-versal-power.h |  54 +++
.../boot/dts/xilinx/xlnx-versal-resets.h      | 105 +++++
9 files changed, 858 insertions(+), 23 deletions(-)
create mode 100644 arch/arm64/boot/dts/xilinx/versal-net-clk-ccf.dtsi
create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-clk.h
create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-net-clk.h
create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-net-power.h
create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-net-resets.h
create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-power.h
create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-resets.h
[PATCH 0/2] clock: versal-clk: Fix Versal NET clock binding and switch to CCF
Posted by Michal Simek 1 month ago
This series fixes the Versal NET clock controller DT binding validation
and switches the platform to use the firmware-based CCF clock interface.

Patch 1 restructures the if/then conditions in the versal-clk binding
schema so that xlnx,versal-net-clk is matched first before falling back
to xlnx,versal-clk. This fixes false "too long" validation errors caused
by both conditions matching simultaneously when the fallback compatible
is present. A dedicated example for the Versal NET 3-clock configuration
is added and all examples are split into separate blocks for independent
validation.

Patch 2 switches Versal NET from static fixed-clock definitions to the
firmware-based CCF clock interface, enabling proper clock management
through platform firmware. DT macro headers for clocks, power domains
and resets are added.

Thanks,
Michal


Michal Simek (2):
  dt-bindings: clock: versal-clk: Reorder if/then conditions for Versal
    NET
  arm64: zynqmp: Switch Versal NET to firmware clock interface

 .../bindings/clock/xlnx,versal-clk.yaml       |  49 ++-
 .../boot/dts/xilinx/versal-net-clk-ccf.dtsi   | 378 ++++++++++++++++++
 .../xilinx/versal-net-vn-x-b2197-01-revA.dts  |   3 +-
 arch/arm64/boot/dts/xilinx/xlnx-versal-clk.h  | 123 ++++++
 .../boot/dts/xilinx/xlnx-versal-net-clk.h     |  78 ++++
 .../boot/dts/xilinx/xlnx-versal-net-power.h   |  38 ++
 .../boot/dts/xilinx/xlnx-versal-net-resets.h  |  53 +++
 .../arm64/boot/dts/xilinx/xlnx-versal-power.h |  54 +++
 .../boot/dts/xilinx/xlnx-versal-resets.h      | 105 +++++
 9 files changed, 858 insertions(+), 23 deletions(-)
 create mode 100644 arch/arm64/boot/dts/xilinx/versal-net-clk-ccf.dtsi
 create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-clk.h
 create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-net-clk.h
 create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-net-power.h
 create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-net-resets.h
 create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-power.h
 create mode 100644 arch/arm64/boot/dts/xilinx/xlnx-versal-resets.h

-- 
2.43.0

base-commit: fbf33803618ad4f531f78fe15cf328fe6c7f9978
branch: zynqmp/dt