From: Bean Huo <beanhuo@micron.com>

The Micron 4100AT fetches PRP Lists in 512 byte strides, but the driver
allocates small PRP List descriptors in 256 byte strides.  A descriptor
in the last 256 bytes of a dmapool page makes the controller read past
the page: the access lands on an adjacent IOVA, the IOMMU faults the
command. That last block only became reachable with commit da9619a30e73
("dmapool: link blocks across pages"), so this affects v6.4 and later.

Align the small descriptor pool to 512 bytes, as commit ebefac564796
("nvme-pci: 512 byte aligned dma pool segment quirk") already does for
another controller with the same erratum.  The last block then starts
at offset 0xE00 and the fetch stays inside the page.

Cc: <stable@vger.kernel.org> # 6.4.x: ebefac564796: nvme-pci: 512 byte aligned dma pool segment quirk
Cc: <stable@vger.kernel.org> # 6.4.x
Signed-off-by: Gaurav Sinha <gsinha@micron.com>
Signed-off-by: Bean Huo <beanhuo@micron.com>
---
Notes for reviewers (not part of the commit message):

* Why the two Cc: stable lines: this device needs the quirk from v6.4
  on, but the quirk itself only exists from v6.13.  Older trees, such
  as the 6.12 LTS where we found this, need ebefac564796 first.  The
  first line asks stable to pick that commit before this one, and the
  second gives 6.4 as the starting version.

* Why no Fixes: tag: the only candidate is da9619a30e73, and that
  commit is not wrong.  It fixed an off-by-one that had been hiding this
  device erratum.  Blaming it did not seem fair, so we left the tag out.
  Happy to add one if the maintainers prefer.

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index db5fc9bf6627..d6dec3ba41f4 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -4141,6 +4141,8 @@ static const struct pci_device_id nvme_id_table[] = {
 		.driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN },
 	 { PCI_DEVICE(0x1344, 0x6001),   /* Micron Nitro NVMe */
 		 .driver_data = NVME_QUIRK_BOGUS_NID, },
+	{ PCI_DEVICE(0x1344, 0x6004),	/* Micron 4100AT */
+		.driver_data = NVME_QUIRK_DMAPOOL_ALIGN_512, },
 	{ PCI_DEVICE(0x1c5c, 0x1504),   /* SK Hynix PC400 */
 		.driver_data = NVME_QUIRK_DISABLE_WRITE_ZEROES, },
 	{ PCI_DEVICE(0x1c5c, 0x174a),   /* SK Hynix P31 SSD */
-- 
2.43.0

On Fri, Sep 04, 2026 at 12:51:55PM +0200, Bean Huo wrote:
> From: Bean Huo <beanhuo@micron.com>

...

> Signed-off-by: Gaurav Sinha <gsinha@micron.com>
> Signed-off-by: Bean Huo <beanhuo@micron.com>

I've applied the patch as-is, however usually the first "Signed-off-by"
is who the patch is attributed to as being "from".

Thanks, applied to nvme-7.3.

On Fri, 2026-09-11 at 09:03 -0600, Keith Busch wrote:
> On Fri, Sep 04, 2026 at 12:51:55PM +0200, Bean Huo wrote:
> > From: Bean Huo <beanhuo@micron.com>
> 
> ...
> 
> > Signed-off-by: Gaurav Sinha <gsinha@micron.com>
> > Signed-off-by: Bean Huo <beanhuo@micron.com>
> 
> I've applied the patch as-is, however usually the first "Signed-off-by"
> is who the patch is attributed to as being "from".
> 
> Thanks, applied to nvme-7.3.

thanks!

Hi,

A gentle ping on this one. It is a single id table entry for the
Micron 4100AT, reusing the existing NVME_QUIRK_DMAPOOL_ALIGN_512.

Happy to respin if you would prefer a Fixes: tag, or a different
form for the stable prerequisite lines.

Thanks,
Bean