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A descriptor in the last 256 bytes of a dmapool page makes the controller read past the page: the access lands on an adjacent IOVA, the IOMMU faults the command. That last block only became reachable with commit da9619a30e73 ("dmapool: link blocks across pages"), so this affects v6.4 and later. Align the small descriptor pool to 512 bytes, as commit ebefac564796 ("nvme-pci: 512 byte aligned dma pool segment quirk") already does for another controller with the same erratum. The last block then starts at offset 0xE00 and the fetch stays inside the page. Cc: # 6.4.x: ebefac564796: nvme-pci: 512 byte alig= ned dma pool segment quirk Cc: # 6.4.x Signed-off-by: Gaurav Sinha Signed-off-by: Bean Huo --- Notes for reviewers (not part of the commit message): * Why the two Cc: stable lines: this device needs the quirk from v6.4 on, but the quirk itself only exists from v6.13. Older trees, such as the 6.12 LTS where we found this, need ebefac564796 first. The first line asks stable to pick that commit before this one, and the second gives 6.4 as the starting version. * Why no Fixes: tag: the only candidate is da9619a30e73, and that commit is not wrong. It fixed an off-by-one that had been hiding this device erratum. Blaming it did not seem fair, so we left the tag out. Happy to add one if the maintainers prefer. diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index db5fc9bf6627..d6dec3ba41f4 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -4141,6 +4141,8 @@ static const struct pci_device_id nvme_id_table[] =3D= { .driver_data =3D NVME_QUIRK_IGNORE_DEV_SUBNQN }, { PCI_DEVICE(0x1344, 0x6001), /* Micron Nitro NVMe */ .driver_data =3D NVME_QUIRK_BOGUS_NID, }, + { PCI_DEVICE(0x1344, 0x6004), /* Micron 4100AT */ + .driver_data =3D NVME_QUIRK_DMAPOOL_ALIGN_512, }, { PCI_DEVICE(0x1c5c, 0x1504), /* SK Hynix PC400 */ .driver_data =3D NVME_QUIRK_DISABLE_WRITE_ZEROES, }, { PCI_DEVICE(0x1c5c, 0x174a), /* SK Hynix P31 SSD */ --=20 2.43.0