Hi,

This series by Shay fixes four bugs in the Socket Direct LAG and devcom
subsystems, all related to initialization/teardown ordering and
concurrent access to the LAG device.

Regards,
Tariq

Shay Drory (4):
  net/mlx5: SD, serialize SD LAG init/cleanup against LAG mode changes
  net/mlx5: devcom, Base component size on linked devices
  net/mlx5: SD, unload reps on shared FDB create error path
  net/mlx5: LAG, reload IB reps of LAG master before the rest

 .../net/ethernet/mellanox/mlx5/core/eswitch.c |  2 +-
 .../net/ethernet/mellanox/mlx5/core/lag/lag.c | 74 ++++++++++++-------
 .../mellanox/mlx5/core/lag/shared_fdb.c       |  1 +
 .../ethernet/mellanox/mlx5/core/lib/devcom.c  |  5 +-
 .../net/ethernet/mellanox/mlx5/core/lib/sd.c  | 13 ++++
 5 files changed, 65 insertions(+), 30 deletions(-)


base-commit: 70f3995830d3f1e79faa14eb0605914f778feca9
-- 
2.44.0

On Wed, 2 Sep 2026 19:37:12 +0300 Tariq Toukan wrote:
> Hi,
> 
> This series by Shay fixes four bugs in the Socket Direct LAG and devcom
> subsystems, all related to initialization/teardown ordering and
> concurrent access to the LAG device.

Patchwork seems right, this doesn't apply.

Failed to apply patch:
Applying: net/mlx5: SD, serialize SD LAG init/cleanup against LAG mode changes
error: git diff header lacks filename information when removing 1 leading pathname component at .git/rebase-apply/patch:10
error: could not build fake ancestor

The format of the pre-replies seems to break git am?