Fix always-enabling PCIE_RSCC clocks for multiple clk drivers

[PATCH RFT 0/3] Fix always-enabling PCIE_RSCC clocks for multiple clk drivers

Posted by Luca Weiss 1 month, 3 weeks ago

I've noticed that the .clk_cbcrs list in multiple clock drivers enable
the GCC_PCIE_RSCC_CFG_AHB_CLK and GCC_PCIE_RSCC_XO_CLK wrongly.

qcom_branch_set_clk_en() will be called on each entry which will set
BIT(0) to enable the clock, but this is wrong for these two clocks which
-- this is also why this is marked RFT -- at least for kaanapali
needs BIT(20) and BIT(21) set to enable them.

I don't know which downstream codename (in the vendor kernel) eliza and
hawi are so I just assumed the same BIT(20) and BIT(21) would be correct
there. Please verify this!

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Luca Weiss (3):
      clk: qcom: gcc-eliza: Fix always-enabling PCIE_RSCC clocks
      clk: qcom: gcc-hawi: Fix always-enabling PCIE_RSCC clocks
      clk: qcom: gcc-kaanapali: Fix always-enabling PCIE_RSCC clocks

 drivers/clk/qcom/gcc-eliza.c     | 6 ++++--
 drivers/clk/qcom/gcc-hawi.c      | 6 ++++--
 drivers/clk/qcom/gcc-kaanapali.c | 6 ++++--
 3 files changed, 12 insertions(+), 6 deletions(-)
---
base-commit: d56fa0b2bd2d9b2fddc10e8f5bdd42d56676935c
change-id: 20260807-various-pcie-clk-fix-6bafb619e7ab

Best regards,
--  
Luca Weiss <luca.weiss@fairphone.com>

Re: [PATCH RFT 0/3] Fix always-enabling PCIE_RSCC clocks for multiple clk drivers

Posted by Bjorn Andersson 4 weeks ago

On Fri, 07 Aug 2026 09:46:03 +0200, Luca Weiss wrote:
> I've noticed that the .clk_cbcrs list in multiple clock drivers enable
> the GCC_PCIE_RSCC_CFG_AHB_CLK and GCC_PCIE_RSCC_XO_CLK wrongly.
> 
> qcom_branch_set_clk_en() will be called on each entry which will set
> BIT(0) to enable the clock, but this is wrong for these two clocks which
> -- this is also why this is marked RFT -- at least for kaanapali
> needs BIT(20) and BIT(21) set to enable them.
> 
> [...]

Applied, thanks!

[1/3] clk: qcom: gcc-eliza: Fix always-enabling PCIE_RSCC clocks
      commit: 5ffd02d16f4e2f0566b8f31d5610538987e1944c
[2/3] clk: qcom: gcc-hawi: Fix always-enabling PCIE_RSCC clocks
      commit: 62bbf7ed9ad97c17377377aae50b7ea7feb9464e
[3/3] clk: qcom: gcc-kaanapali: Fix always-enabling PCIE_RSCC clocks
      commit: 0bfb542fc3368371cefb4cf45ef21c3ba2d37c3f

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

Re: [PATCH RFT 0/3] Fix always-enabling PCIE_RSCC clocks for multiple clk drivers

Posted by Bjorn Andersson 1 month, 2 weeks ago

On Fri, 07 Aug 2026 09:46:03 +0200, Luca Weiss wrote:
> I've noticed that the .clk_cbcrs list in multiple clock drivers enable
> the GCC_PCIE_RSCC_CFG_AHB_CLK and GCC_PCIE_RSCC_XO_CLK wrongly.
> 
> qcom_branch_set_clk_en() will be called on each entry which will set
> BIT(0) to enable the clock, but this is wrong for these two clocks which
> -- this is also why this is marked RFT -- at least for kaanapali
> needs BIT(20) and BIT(21) set to enable them.
> 
> [...]

Applied, thanks!

[1/3] clk: qcom: gcc-eliza: Fix always-enabling PCIE_RSCC clocks
      commit: 34e0ef622cd41eb5ee77d6aae79276c12de7c20f
[2/3] clk: qcom: gcc-hawi: Fix always-enabling PCIE_RSCC clocks
      commit: c83e1427064e6fe95604b469f4c670e1839f409a
[3/3] clk: qcom: gcc-kaanapali: Fix always-enabling PCIE_RSCC clocks
      commit: 7f6869e53f73c4ca0e622a6a1b5ac2598fee5931

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>