The inline assembly in ep93xx_pata_delay() uses a "subs" instruction
which modifies the ARM condition code flags. Add a "cc" clobber so
the compiler knows the flags are altered. Without it, the compiler may
reorder flag-dependent instructions across the asm block when the
function is inlined, potentially causing incorrect control flow.

Additionally, add a "memory" clobber to prevent the compiler from
reordering I/O accesses across this delay loop. On older ARM
architectures like ARMv4T used in EP93xx, __iormb()/__iowmb() may
evaluate to empty when CONFIG_ARM_DMA_MEM_BUFFERABLE is not set,
leaving writel()/readl() without a compiler memory barrier. Without
a "memory" clobber here, the compiler optimizer might reorder
independent I/O accesses across the delay, violating ATA PIO timing
requirements. This also brings the ARM path in line with the non-ARM
fallback which uses cpu_relax() (a compiler barrier).

Fixes: 2fff27512600 ("PATA host controller driver for ep93xx")
Assisted-by: Opencode:Big-Pickle
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
 v2: add memory barrier
 drivers/ata/pata_ep93xx.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/ata/pata_ep93xx.c b/drivers/ata/pata_ep93xx.c
index be8a314654e6..085f1e8e5343 100644
--- a/drivers/ata/pata_ep93xx.c
+++ b/drivers/ata/pata_ep93xx.c
@@ -211,6 +211,7 @@ static void ep93xx_pata_delay(unsigned long count)
 		"bge 0b\n"
 		: "=r" (count)
 		: "0" (count)
+		: "cc", "memory"
 	);
 #else
 	while (count--)
-- 
2.55.0