On 7/21/2026 10:58 PM, Loic Poulain wrote:
> The CCI hw_params timing values (thigh, tlow, etc.) are expressed in
> clock ticks and were calibrated for a specific CCI clock frequency per
> hardware variant (19.2 MHz for v1/v1.5/msm8953, 37.5 MHz for v2).
> Running at the wrong frequency causes incorrect I2C timings that may
> violate the I2C specification.
>
> A previous series removed the cci_clk_rate field and the associated
> warning from the driver on the grounds that the warning was noisy and
> the rate was already set via assigned-clock-rates in the DT. However,
> enforcing a clock frequency configuration through DT is fragile and not
> the right approach, the driver owns the hw_params and should own the
> clock rate too.
>
> This series reverts the removal of cci_clk_rate, fixes the missing rate
> for the msm8953 variant (added after the field was removed), and
> replaces the passive warn-only approach with an active clk_set_rate()
> at probe time, retaining the warning for cases where the rate cannot be
> applied.
>
> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
> ---
> Loic Poulain (3):
> Revert "i2c: qcom-cci: Remove unused struct member cci_clk_rate"
> i2c: qcom-cci: Add missing cci_clk_rate for msm8953
> i2c: qcom-cci: Fix CCI clock rate enforcement
>
> drivers/i2c/busses/i2c-qcom-cci.c | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
> ---
> base-commit: fce2dfa773ced15f27dd27cd0b482a7473cdcf2a
> change-id: 20260721-cci-clk-fix-fe145b2acfa7
>
> Best regards,
For this patch series:
Tested-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>