.../bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml | 19 ++ drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 220 +++++++++++++++++++++ 2 files changed, 239 insertions(+)
Qualcomm's IPQ9650 SoC has 3 Gen3 dual lane and 2 Gen3 single lane
controllers with the QMP PHYs. Unlike the PHYs in the other IPQ SoC,
refgen supply is needed to bringup the PHYs. Both single and dual lane
shares the same HW init sequence. So reuse the tables.
Document the compatible along with refgen supply and add the phy driver
support for it.
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
---
Changes in v3:
- Rebased on linux-next: next-20260710
- Pick up R-b tag
- Incorporate the link stability issue fix (QSERDES_V4_RX_RX_MODE_00_HIGH4
from 0x35 to 0x3a) recommended by the IP team.
Changes in v2:
- rebase on phy-next
- pick up R-b tag
- Link to v1:
https://lore.kernel.org/linux-arm-msm/20260602-ipq9650_pcie_phy-v1-0-d8c32a36dbd9@oss.qualcomm.com/
To: Vinod Koul <vkoul@kernel.org>
To: Neil Armstrong <neil.armstrong@linaro.org>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-phy@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
Kathiravan Thirumoorthy (2):
dt-bindings: phy: qcom,ipq8074-qmp-pcie: document IPQ9650 QMP PCIe PHYs
phy: qcom: qmp-pcie: Add IPQ9650 PCIe PHY support
.../bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml | 19 ++
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 220 +++++++++++++++++++++
2 files changed, 239 insertions(+)
---
base-commit: bee763d5f341b99cf472afeb508d4988f62a6ca1
change-id: 20260521-ipq9650_pcie_phy-60d7df32581c
Best regards,
--
Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
On Fri, 10 Jul 2026 23:16:39 +0530, Kathiravan Thirumoorthy wrote:
> Qualcomm's IPQ9650 SoC has 3 Gen3 dual lane and 2 Gen3 single lane
> controllers with the QMP PHYs. Unlike the PHYs in the other IPQ SoC,
> refgen supply is needed to bringup the PHYs. Both single and dual lane
> shares the same HW init sequence. So reuse the tables.
>
> Document the compatible along with refgen supply and add the phy driver
> support for it.
>
> [...]
Applied, thanks!
[1/2] dt-bindings: phy: qcom,ipq8074-qmp-pcie: document IPQ9650 QMP PCIe PHYs
commit: 7218d17e7613d5949cfc6215101493418fa501c0
[2/2] phy: qcom: qmp-pcie: Add IPQ9650 PCIe PHY support
commit: ee6aa0f01d4e8eddf1c7fda49d65c7ef12444e78
Best regards,
--
~Vinod
On 7/10/2026 11:16 PM, Kathiravan Thirumoorthy wrote: > Qualcomm's IPQ9650 SoC has 3 Gen3 dual lane and 2 Gen3 single lane > controllers with the QMP PHYs. Unlike the PHYs in the other IPQ SoC, > refgen supply is needed to bringup the PHYs. Both single and dual lane > shares the same HW init sequence. So reuse the tables. > > Document the compatible along with refgen supply and add the phy driver > support for it. > > Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> > --- Vinod, Gentle ping... > Changes in v3: > - Rebased on linux-next: next-20260710 > - Pick up R-b tag > - Incorporate the link stability issue fix (QSERDES_V4_RX_RX_MODE_00_HIGH4 > from 0x35 to 0x3a) recommended by the IP team. > Changes in v2: > - rebase on phy-next > - pick up R-b tag > - Link to v1: > https://lore.kernel.org/linux-arm-msm/20260602-ipq9650_pcie_phy-v1-0-d8c32a36dbd9@oss.qualcomm.com/ > > To: Vinod Koul <vkoul@kernel.org> > To: Neil Armstrong <neil.armstrong@linaro.org> > To: Rob Herring <robh@kernel.org> > To: Krzysztof Kozlowski <krzk+dt@kernel.org> > To: Conor Dooley <conor+dt@kernel.org> > Cc: linux-arm-msm@vger.kernel.org > Cc: linux-phy@lists.infradead.org > Cc: devicetree@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > > --- > Kathiravan Thirumoorthy (2): > dt-bindings: phy: qcom,ipq8074-qmp-pcie: document IPQ9650 QMP PCIe PHYs > phy: qcom: qmp-pcie: Add IPQ9650 PCIe PHY support > > .../bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml | 19 ++ > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 220 +++++++++++++++++++++ > 2 files changed, 239 insertions(+) > --- > base-commit: bee763d5f341b99cf472afeb508d4988f62a6ca1 > change-id: 20260521-ipq9650_pcie_phy-60d7df32581c > > Best regards, > -- > Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> >
© 2016 - 2026 Red Hat, Inc.