[PATCH 0/3] usb: dwc3: add snps,reinit-phy-on-resume quirk for USB2 PHY power loss during S3

Oliver White posted 3 patches 6 days, 6 hours ago
.../bindings/usb/snps,dwc3-common.yaml        | 10 ++++++++
.../dts/qcom/x1e80100-microsoft-romulus.dtsi  |  4 +++
drivers/usb/dwc3/core.c                       | 25 +++++++++++++++++++
drivers/usb/dwc3/core.h                       |  1 +
4 files changed, 40 insertions(+)
[PATCH 0/3] usb: dwc3: add snps,reinit-phy-on-resume quirk for USB2 PHY power loss during S3
Posted by Oliver White 6 days, 6 hours ago
The Surface Laptop 7 (x1e80100-romulus) gates the USB2 PHY power domain
during S3 even when device_may_wakeup is set, causing PHY register
state to be lost. The DWC3 fast-resume path calls
phy_pm_runtime_get_sync() to restore the PHY, but this is a no-op for
PHY drivers that do not implement runtime PM (e.g. the Qualcomm eUSB2
driver), resulting in corrupted USB2 signalling on resume.

This series adds a new DT quirk flag that forces a full phy_exit() +
phy_init() cycle on each USB2 PHY during system resume, and enables it
for the Romulus board.

Patch 1 documents the new dt-binding property.
Patch 2 implements the quirk in the DWC3 core driver.
Patch 3 enables the quirk on x1e80100-microsoft-romulus.

Oliver White (3):
  dt-bindings: usb: dwc3: document snps,reinit-phy-on-resume
  usb: dwc3: add reinit-phy-on-resume quirk
  arm64: dts: qcom: x1e80100-microsoft-romulus: add phy-reinit-on-resume

 .../bindings/usb/snps,dwc3-common.yaml        | 10 ++++++++
 .../dts/qcom/x1e80100-microsoft-romulus.dtsi  |  4 +++
 drivers/usb/dwc3/core.c                       | 25 +++++++++++++++++++
 drivers/usb/dwc3/core.h                       |  1 +
 4 files changed, 40 insertions(+)

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2.53.0