Here add illegal parameter check in kvm_vcpu_ioctl_interrupt() since this
function is called from user mode. Also interrupt inject is handled with
batch method, rather one by one.
---
v4 ... v5:
1. Replace constant 2 with macro GINTC_VIP_DELTA in patch 4.
2. Keep register CSR_GINTC bits unchanged except CPU_IP0 - CPU_IP7 in
function _kvm_setcsr().
3. Add new patch 6 which moves function call with kvm_deliver_intr()
after smp_store_mb(vcpu->mode, IN_GUEST_MODE).
v3 ... v4:
1. change type of local variable vector with unsigned int rather than
int, and use abs() macro.
2. Remove last patch since kvm_vcpu_sync_intr() does not sync cached
AVEC interrupt to SW CSR_ISR state.
3. Replace kvm_set_sw_gcsr() with kvm_write_sw_gcsr() in patch 5,
since kvm_set_sw_gcsr() is ORed cached ESTAT interrupt bits,
kvm_write_sw_gcsr() is to overwrite the whole SW ESTAT register.
4. Modify typo issue about title and log message in patch 5, replace
GSTAT with ESTAT
v2 ... v3:
1. Split patch 1 into two smaller patches, one is smaller bugfix patch
with irq validility check in kvm_vcpu_ioctl_interrupt(), so that it
is easy to porting to old kernel.
v1 ... v2:
1. Add irq validility check in function kvm_vcpu_ioctl_interrupt().
2. Add valid bit check when set ESTAT CSR register.
3. Merge two patches about interrupt clear and set with batch method into
one.
---
Bibo Mao (6):
LoongArch: KVM: Check irq validility in kvm_vcpu_ioctl_interrupt()
LoongArch: KVM: Check msgint feature in interrupt post
LoongArch: KVM: Use existing macro about interrupt bit mask
LoongArch: KVM: Inject interrupt with batch method
LoongArch: KVM: Add valid bit check when set ESTAT CSR register
LoongArch: KVM: Deliver interrupt after IN_GUEST_MODE is set
arch/loongarch/include/asm/kvm_vcpu.h | 43 +++++++----
arch/loongarch/kvm/interrupt.c | 100 ++++++++------------------
arch/loongarch/kvm/vcpu.c | 46 ++++++++----
3 files changed, 88 insertions(+), 101 deletions(-)
base-commit: e8c2f9fdadee7cbc75134dc463c1e0d856d6e5c7
--
2.39.3