[PATCH v5 0/3] counter: add GPIO-based counter driver

Wadim Mueller posted 3 patches 2 weeks, 1 day ago
.../bindings/counter/gpio-counter.yaml        |  59 ++
MAINTAINERS                                   |   7 +
drivers/counter/Kconfig                       |  17 +
drivers/counter/Makefile                      |   1 +
drivers/counter/gpio-counter.c                | 744 ++++++++++++++++++
5 files changed, 828 insertions(+)
create mode 100644 Documentation/devicetree/bindings/counter/gpio-counter.yaml
create mode 100644 drivers/counter/gpio-counter.c
[PATCH v5 0/3] counter: add GPIO-based counter driver
Posted by Wadim Mueller 2 weeks, 1 day ago
This series adds a counter subsystem driver that does quadrature
encoder position tracking with plain GPIO pins and edge interrupts.
Compared to interrupt-cnt.c (pulse-only) it provides full A/B/Index
decoding and exposes the counter sysfs ABI.  Target hardware is
low- to medium-speed rotary encoders on SoCs without a free eQEP /
FTM / etc.  Benchmark rig: github.com/wafgo/qenc-bench.

Changes in v5
-------------

Following William's v4 review the driver and binding are renamed
from "gpio-quadrature-encoder" to "gpio-counter" -- the name now
reflects what the hardware is, not one of its functions.  This
renames the source file, Kconfig symbol, compatible string, binding
file and DT properties (encoder-{a,b}-gpios -> signal-{a,b}-gpios,
encoder-index-gpios -> index-gpios).  Out-of-tree users on v1-v4
will need to update their DTs.

Conor's v4 Acked-by on the binding was dropped because of these
rename changes -- a fresh Ack would be appreciated.

Driver fixes from William's review:
  - X4 decoder rewritten using the 2-bit Gray-code parity trick
    (STATE_CHANGED = pa^pb^ca^cb, DIRECTION via pb^ca) -- no more
    16-entry lookup table.
  - X1_A / X1_B now count on rising-when-forward / falling-when-
    backward in the per-edge ISRs, with the X1 direction caveat
    documented in the source.
  - action_read holds priv->lock while reading function/direction
    and returns from each case directly.
  - ceiling_write no longer touches priv->count (matches intel-qep,
    ti-eqep, stm32-timer-cnt); the >= guard in the update path
    prevents further growth.
  - Dropped the redundant functions_list check in function_write
    and the !!val rewrite in preset_enable_write.

Sashiko AI [1] flagged seven issues on v4, all addressed:
  1. Normalise GPIO reads (a = !!a; b = !!b;) so negative error
     codes from gpiod_get_value() cannot index the state tables.
  2. priv->enabled tracked under priv->lock -- enable_write is
     now idempotent.
  3. preset/ceiling TOCTOU closed by moving the check under
     priv->lock; index ISR clamps after preset load.
  4. probe rejects sleepable GPIOs via gpiod_cansleep().
  5. action_read reports RISING/FALLING based on current direction,
     matching what the ISR counts on.
  6. action_read holds priv->lock (same fix as William's review).
  7. IRQF_NO_AUTOEN replaces irq_set_status_flags(IRQ_NOAUTOEN).

MAINTAINERS: section renamed to "GPIO COUNTER DRIVER" and resorted
alphabetically between "GPIO AGGREGATOR" and "GPIO IR Transmitter".

Thanks to William for the patient review and to the Sashiko bot
for the extra finds.

[1] https://sashiko.dev/#/patchset/20260515153616.157605-1-wafgo01@gmail.com?part=2

Wadim Mueller (3):
  dt-bindings: counter: add gpio-counter binding
  counter: add GPIO-based counter driver
  MAINTAINERS: add entry for GPIO counter driver

 .../bindings/counter/gpio-counter.yaml        |  59 ++
 MAINTAINERS                                   |   7 +
 drivers/counter/Kconfig                       |  17 +
 drivers/counter/Makefile                      |   1 +
 drivers/counter/gpio-counter.c                | 744 ++++++++++++++++++
 5 files changed, 828 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/counter/gpio-counter.yaml
 create mode 100644 drivers/counter/gpio-counter.c


base-commit: 3cd8b194bf3428dfa53120fee47e827a7c495815
-- 
2.52.0
Re: [PATCH v5 0/3] counter: add GPIO-based counter driver
Posted by Wadim Mueller 11 hours ago
On Sun, 24 May 2026 21:38:43 +0200
Wadim Mueller <wafgo01@gmail.com> wrote:

> Add a binding for a generic GPIO-based counter.

Hi William,

gentle ping on v5 - it should address all your v4 feedback, and Conor has
acked the binding [1]. Anything still open?

Thanks,
Wadim

[1] https://lore.kernel.org/all/20260525-register-bogus-b198545b69a8@spud/
Re: [PATCH v5 0/3] counter: add GPIO-based counter driver
Posted by William Breathitt Gray 7 hours ago
On Mon, Jun 08, 2026 at 02:19:32PM +0200, Wadim Mueller wrote:
> On Sun, 24 May 2026 21:38:43 +0200
> Wadim Mueller <wafgo01@gmail.com> wrote:
> 
> > Add a binding for a generic GPIO-based counter.
> 
> Hi William,
> 
> gentle ping on v5 - it should address all your v4 feedback, and Conor has
> acked the binding [1]. Anything still open?
> 
> Thanks,
> Wadim
> 
> [1] https://lore.kernel.org/all/20260525-register-bogus-b198545b69a8@spud/

Hi Wadim,

Sorry to keep you waiting. I'm still working on the review for v5, but I
should have it complete by the end of this weekend if not sooner.

Thanks,

William Breathitt Gray