[PATCH v4 0/5] Add DU support for RZ/T2H and RZ/N2H SoCs

Prabhakar posted 5 patches 5 days, 9 hours ago
.../bindings/display/renesas,rzg2l-du.yaml    | 21 +++++++++++++++++--
drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c |  9 ++++++--
drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c  | 20 +++++++++++++++++-
drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.h  | 14 +++++++++++++
.../gpu/drm/renesas/rz-du/rzg2l_du_encoder.c  |  9 +++++++-
5 files changed, 67 insertions(+), 6 deletions(-)
[PATCH v4 0/5] Add DU support for RZ/T2H and RZ/N2H SoCs
Posted by Prabhakar 5 days, 9 hours ago
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi All,

This series adds support for the Display Unit (DU) on the RZ/T2H
and RZ/N2H (R9A09G087) SoCs. The DU on these platforms is
functionally similar to the RZ/G2UL DU but includes some SoC
specific differences such as a single output port and explicit
DPI output enable control. The series includes the following
changes:
1. Add device tree bindings for the RZ/T2H and RZ/N2H DU variants,
   including a new compatible string.
2. Make the DU reset control optional to allow probing on RZ/T2H
   where the DU does not have a reset line.
3. Move pixel clock validation logic to per-SoC constraints in
   rzg2l_du_device_info to accommodate different clock limits
   across SoCs.
4. Implement support for the RZ/T2H DU variant in the driver,
   including handling of the DPI output enable signal.

Patches are rebased on next-20260519 and apply on drm-next.

v3->v4:
- Added Acked-by tag from Rob for patch #1
- Added Reviewed-by tag from Rob for patches #2
- Dropped per pad limits in patch #4 and added
  a check to return early if the output is not DPAD0,
  as the clock limits only apply to that output.
- Updated commit message in patch #4

v2->v3:
- Rebased on latest next-20260508.
- Included Tommaso's patch to refuse port@1 for RZ/G2UL, which was
  previously in a separate series.
- Moved clock limits from device_info to output_routing to allow
  per-output constraints.
- Updated commit message for patch#4

v1->v2:
- Dropped the "port" property in favor of "ports" with a single port@0
  child, to align with the existing RZ/G2L bindings and simplify the
  device tree structure.
- Updated the commit message to reflect the change from "port" to "ports".
- Dropped storing info pointer in struct rzg2l_du_encoder as it's not
  needed.
- Add Reviewed-by tags from Laurent for patches 2-4.
- Rebase on latest next-20260507.

Cheers,
Prabhakar

Lad Prabhakar (4):
  dt-bindings: display: renesas,rzg2l-du: Add RZ/T2H and RZ/N2H support
  drm: renesas: rz-du: Make DU reset control optional for RZ/T2H support
  drm: renesas: rz-du: Move mode_valid logic to per-SoC clock limits
  drm: renesas: rz-du: Add support for RZ/T2H SoC

Tommaso Merciai (1):
  dt-bindings: display: renesas,rzg2l-du: Refuse port@1 for RZ/G2UL

 .../bindings/display/renesas,rzg2l-du.yaml    | 21 +++++++++++++++++--
 drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c |  9 ++++++--
 drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c  | 20 +++++++++++++++++-
 drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.h  | 14 +++++++++++++
 .../gpu/drm/renesas/rz-du/rzg2l_du_encoder.c  |  9 +++++++-
 5 files changed, 67 insertions(+), 6 deletions(-)

-- 
2.54.0