[v2] i2c: tegra: Improve DMA mapping, latency, and power management

[PATCH v2 0/4] i2c: tegra: Improve DMA mapping, latency, and power management

Akhil R posted 4 patches 6 days, 16 hours ago

Diff against v1
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drivers/i2c/busses/i2c-tegra.c | 87 +++++++++++++++++++++++-----------
1 file changed, 59 insertions(+), 28 deletions(-)

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[PATCH v2 0/4] i2c: tegra: Improve DMA mapping, latency, and power management

Posted by Akhil R 6 days, 16 hours ago

This series addresses several aspects of the Tegra I2C driver:

- DMA mapping: Use the proper DMA device for buffer allocation to
  ensure correct DMA address translation.
- Transfer latency: Disable fair arbitration on non-MCTP buses to
  reduce transfer latency.
- Timing parameters: Update I2C timing values for Tegra410.
- Power management: Keep the controller available during noirq
  suspend/resume phases for system dependencies.

v1->v2:
  * Add description for is_mctp in the struct

Akhil R (4):
  i2c: tegra: use dmaengine_get_dma_device() for DMA buffer allocation
  i2c: tegra: Disable fair arbitration for non-MCTP buses
  i2c: tegra: Update Tegra410 I2C timing parameters
  i2c: tegra: Fix NOIRQ suspend/resume

 drivers/i2c/busses/i2c-tegra.c | 87 +++++++++++++++++++++++-----------
 1 file changed, 59 insertions(+), 28 deletions(-)

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2.50.1