riscv: ultrarisc: add DP1000 SoC DT and pinctrl support

[PATCH 0/9] riscv: ultrarisc: add DP1000 SoC DT and pinctrl support

Posted by Jia Wang via B4 Relay 4 weeks ago

This series adds initial Devicetree support for the UltraRISC DP1000 RISC-V
SoC and two DP1000-based boards (Milk-V Titan and Rongda M0).

The series introduces the required DT bindings, adds the DP1000 pinctrl
driver, and provides the initial SoC/board DTS files.

Notes:
  - Clocks are configured and enabled by firmware before Linux boots. Linux
    does not manage clock rates or gating at runtime on this platform.
    Therefore the initial DT only models the fixed clocks required by
    standard drivers, and no clock controller/driver is provided.
  - The DP1000 pinctrl binding supports two child node styles under the same
    controller compatible:
      * legacy DP1000-specific nodes using phandle-array properties
        "pinctrl-pins" and "pinconf-pins"
      * generic pinctrl nodes using "pins", "function" and generic pin
        configuration properties
    The legacy form is kept for compatibility with existing vendor DTs.
  - The bindings for "ultrarisc,dp1000-uart" and "ultrarisc,dp1000-pcie" are
    being reviewed in separate series, since the DP1000 SoC DTS introduced
    here uses those compatibles:
    * Link: https://lore.kernel.org/lkml/20260429-ultrarisc-serial-v7-3-e475cce9e274@ultrarisc.com/
    * Link: https://lore.kernel.org/lkml/20260427-ultrarisc-pcie-v4-2-98935f6cdfb5@ultrarisc.com/
  - ARCH_ULTRARISC support is being reviewed separately:
    * Link: https://lore.kernel.org/lkml/20260427-ultrarisc-pcie-v4-1-98935f6cdfb5@ultrarisc.com/

Testing:
  - dt_binding_check and yamllint (all new/modified binding YAMLs)
  - dtbs_check and dtbs (RISC-V, including dp1000-milkv-titan.dtb and
    dp1000-rongda-m0.dtb)
  - Kernel build for RISC-V and boot-tested on DP1000 (Milk-V Titan and
    Rongda M0)

Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
---
Jia Wang (9):
      dt-bindings: vendor-prefixes: add Rongda
      dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible
      dt-bindings: riscv: Add UltraRISC DP1000 bindings
      dt-bindings: pinctrl: Add UltraRISC DP1000 pinctrl bindings
      riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000
      pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver
      riscv: dts: ultrarisc: add Rongda M0 board device tree
      riscv: dts: ultrarisc: add Milk-V Titan board device tree
      riscv: defconfig: enable ARCH_ULTRARISC

 .../bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml | 168 ++++
 Documentation/devicetree/bindings/riscv/cpus.yaml  |   1 +
 .../devicetree/bindings/riscv/ultrarisc.yaml       |  27 +
 .../devicetree/bindings/vendor-prefixes.yaml       |   2 +
 MAINTAINERS                                        |  15 +
 arch/riscv/boot/dts/Makefile                       |   1 +
 arch/riscv/boot/dts/ultrarisc/Makefile             |   3 +
 .../dts/ultrarisc/dp1000-milkv-titan-pinctrl.dtsi  | 107 +++
 .../boot/dts/ultrarisc/dp1000-milkv-titan.dts      | 182 +++++
 .../dts/ultrarisc/dp1000-rongda-m0-pinctrl.dtsi    |  85 ++
 arch/riscv/boot/dts/ultrarisc/dp1000-rongda-m0.dts | 111 +++
 arch/riscv/boot/dts/ultrarisc/dp1000.dtsi          | 851 +++++++++++++++++++++
 arch/riscv/configs/defconfig                       |   1 +
 drivers/pinctrl/Kconfig                            |   1 +
 drivers/pinctrl/Makefile                           |   1 +
 drivers/pinctrl/ultrarisc/Kconfig                  |  23 +
 drivers/pinctrl/ultrarisc/Makefile                 |   4 +
 drivers/pinctrl/ultrarisc/pinctrl-dp1000.c         | 112 +++
 drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.c      | 746 ++++++++++++++++++
 drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.h      |  71 ++
 .../dt-bindings/pinctrl/ultrarisc,dp1000-pinctrl.h |  65 ++
 21 files changed, 2577 insertions(+)
---
base-commit: 50897c955902c93ae71c38698abb910525ebdc89
change-id: 20260316-ultrarisc-pinctrl-efa6e24c4803

Best regards,
--  
Jia Wang <wangjia@ultrarisc.com>

Re: [PATCH 0/9] riscv: ultrarisc: add DP1000 SoC DT and pinctrl support

Posted by Conor Dooley 4 weeks ago

Hey,

On Fri, May 15, 2026 at 09:17:56AM +0800, Jia Wang wrote:
> This series adds initial Devicetree support for the UltraRISC DP1000 RISC-V
> SoC and two DP1000-based boards (Milk-V Titan and Rongda M0).
> 
> The series introduces the required DT bindings, adds the DP1000 pinctrl
> driver, and provides the initial SoC/board DTS files.
> 
> Notes:
>   - Clocks are configured and enabled by firmware before Linux boots. Linux
>     does not manage clock rates or gating at runtime on this platform.
>     Therefore the initial DT only models the fixed clocks required by
>     standard drivers, and no clock controller/driver is provided.

I really disagree with this approach. In my experience it never ends up
working out and ends up being disruptive, because it is either an over
simplification of the clock tree and condenses multiple different clocks
into one where rates are similar or because firmware changes mean clock
rate changes down the line. I would much rather you modelled the clocks
accurately, even if that just means that a read-only clock controller is
implemented. Alternatively, if firmware does all of your clock control,
you can implement this using rpmi/mpoxy using clk-rpmi.c

>   - The DP1000 pinctrl binding supports two child node styles under the same
>     controller compatible:
>       * legacy DP1000-specific nodes using phandle-array properties
>         "pinctrl-pins" and "pinconf-pins"
>       * generic pinctrl nodes using "pins", "function" and generic pin
>         configuration properties
>     The legacy form is kept for compatibility with existing vendor DTs.

Why would we want "legacy" stuff in mainline when this is a brand new
platform? "legacy" vendor devicetrees are not something that mainline
cares about, sorry.

Additionally, these pinctrl patches should be sent standalone to the
pinctrl maintainers, they're likely to go through lots of revisions and
a different maintainer applies them.

>   - The bindings for "ultrarisc,dp1000-uart" and "ultrarisc,dp1000-pcie" are
>     being reviewed in separate series, since the DP1000 SoC DTS introduced
>     here uses those compatibles:
>     * Link: https://lore.kernel.org/lkml/20260429-ultrarisc-serial-v7-3-e475cce9e274@ultrarisc.com/
>     * Link: https://lore.kernel.org/lkml/20260427-ultrarisc-pcie-v4-2-98935f6cdfb5@ultrarisc.com/
>   - ARCH_ULTRARISC support is being reviewed separately:
>     * Link: https://lore.kernel.org/lkml/20260427-ultrarisc-pcie-v4-1-98935f6cdfb5@ultrarisc.com/

IMO, this patch needs to be in this series so that it compiles.

Cheers,
Conor.

> 
> Testing:
>   - dt_binding_check and yamllint (all new/modified binding YAMLs)
>   - dtbs_check and dtbs (RISC-V, including dp1000-milkv-titan.dtb and
>     dp1000-rongda-m0.dtb)
>   - Kernel build for RISC-V and boot-tested on DP1000 (Milk-V Titan and
>     Rongda M0)
> 
> Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
> ---
> Jia Wang (9):
>       dt-bindings: vendor-prefixes: add Rongda
>       dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible
>       dt-bindings: riscv: Add UltraRISC DP1000 bindings
>       dt-bindings: pinctrl: Add UltraRISC DP1000 pinctrl bindings
>       riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000
>       pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver
>       riscv: dts: ultrarisc: add Rongda M0 board device tree
>       riscv: dts: ultrarisc: add Milk-V Titan board device tree
>       riscv: defconfig: enable ARCH_ULTRARISC
> 
>  .../bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml | 168 ++++
>  Documentation/devicetree/bindings/riscv/cpus.yaml  |   1 +
>  .../devicetree/bindings/riscv/ultrarisc.yaml       |  27 +
>  .../devicetree/bindings/vendor-prefixes.yaml       |   2 +
>  MAINTAINERS                                        |  15 +
>  arch/riscv/boot/dts/Makefile                       |   1 +
>  arch/riscv/boot/dts/ultrarisc/Makefile             |   3 +
>  .../dts/ultrarisc/dp1000-milkv-titan-pinctrl.dtsi  | 107 +++
>  .../boot/dts/ultrarisc/dp1000-milkv-titan.dts      | 182 +++++
>  .../dts/ultrarisc/dp1000-rongda-m0-pinctrl.dtsi    |  85 ++
>  arch/riscv/boot/dts/ultrarisc/dp1000-rongda-m0.dts | 111 +++
>  arch/riscv/boot/dts/ultrarisc/dp1000.dtsi          | 851 +++++++++++++++++++++
>  arch/riscv/configs/defconfig                       |   1 +
>  drivers/pinctrl/Kconfig                            |   1 +
>  drivers/pinctrl/Makefile                           |   1 +
>  drivers/pinctrl/ultrarisc/Kconfig                  |  23 +
>  drivers/pinctrl/ultrarisc/Makefile                 |   4 +
>  drivers/pinctrl/ultrarisc/pinctrl-dp1000.c         | 112 +++
>  drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.c      | 746 ++++++++++++++++++
>  drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.h      |  71 ++
>  .../dt-bindings/pinctrl/ultrarisc,dp1000-pinctrl.h |  65 ++
>  21 files changed, 2577 insertions(+)
> ---
> base-commit: 50897c955902c93ae71c38698abb910525ebdc89
> change-id: 20260316-ultrarisc-pinctrl-efa6e24c4803
> 
> Best regards,
> --  
> Jia Wang <wangjia@ultrarisc.com>
>

Re: [PATCH 0/9] riscv: ultrarisc: add DP1000 SoC DT and pinctrl support

Posted by Jia Wang 3 weeks, 1 day ago

On 2026-05-15 11:05 +0100, Conor Dooley wrote:
> Hey,
> 
> On Fri, May 15, 2026 at 09:17:56AM +0800, Jia Wang wrote:
> > This series adds initial Devicetree support for the UltraRISC DP1000 RISC-V
> > SoC and two DP1000-based boards (Milk-V Titan and Rongda M0).
> > 
> > The series introduces the required DT bindings, adds the DP1000 pinctrl
> > driver, and provides the initial SoC/board DTS files.
> > 
> > Notes:
> >   - Clocks are configured and enabled by firmware before Linux boots. Linux
> >     does not manage clock rates or gating at runtime on this platform.
> >     Therefore the initial DT only models the fixed clocks required by
> >     standard drivers, and no clock controller/driver is provided.
> 
> I really disagree with this approach. In my experience it never ends up
> working out and ends up being disruptive, because it is either an over
> simplification of the clock tree and condenses multiple different clocks
> into one where rates are similar or because firmware changes mean clock
> rate changes down the line. I would much rather you modelled the clocks
> accurately, even if that just means that a read-only clock controller is
> implemented. Alternatively, if firmware does all of your clock control,
> you can implement this using rpmi/mpoxy using clk-rpmi.c
> 

Understood. I'll implement a read-only clock controller in v2.

> >   - The DP1000 pinctrl binding supports two child node styles under the same
> >     controller compatible:
> >       * legacy DP1000-specific nodes using phandle-array properties
> >         "pinctrl-pins" and "pinconf-pins"
> >       * generic pinctrl nodes using "pins", "function" and generic pin
> >         configuration properties
> >     The legacy form is kept for compatibility with existing vendor DTs.
> 
> Why would we want "legacy" stuff in mainline when this is a brand new
> platform? "legacy" vendor devicetrees are not something that mainline
> cares about, sorry.
> 

I'll drop the legacy pinctrl node format and keep only the generic pinctrl
bindings in v2.

> Additionally, these pinctrl patches should be sent standalone to the
> pinctrl maintainers, they're likely to go through lots of revisions and
> a different maintainer applies them.
> 

Just to confirm — for v2, should I completely remove the pinctrl
binding/driver from this series and send them as a standalone pinctrl
series, while keeping only the pinctrl references in the DTS?

> >   - The bindings for "ultrarisc,dp1000-uart" and "ultrarisc,dp1000-pcie" are
> >     being reviewed in separate series, since the DP1000 SoC DTS introduced
> >     here uses those compatibles:
> >     * Link: https://lore.kernel.org/lkml/20260429-ultrarisc-serial-v7-3-e475cce9e274@ultrarisc.com/
> >     * Link: https://lore.kernel.org/lkml/20260427-ultrarisc-pcie-v4-2-98935f6cdfb5@ultrarisc.com/
> >   - ARCH_ULTRARISC support is being reviewed separately:
> >     * Link: https://lore.kernel.org/lkml/20260427-ultrarisc-pcie-v4-1-98935f6cdfb5@ultrarisc.com/
> 
> IMO, this patch needs to be in this series so that it compiles.
> 

I’ll move the ARCH_ULTRARISC Kconfig patch into this series. Thanks for
pointing this out.

> Cheers,
> Conor.
> 

Best Regards,
Jia Wang

> > 
> > Testing:
> >   - dt_binding_check and yamllint (all new/modified binding YAMLs)
> >   - dtbs_check and dtbs (RISC-V, including dp1000-milkv-titan.dtb and
> >     dp1000-rongda-m0.dtb)
> >   - Kernel build for RISC-V and boot-tested on DP1000 (Milk-V Titan and
> >     Rongda M0)
> > 
> > Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
> > ---
> > Jia Wang (9):
> >       dt-bindings: vendor-prefixes: add Rongda
> >       dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible
> >       dt-bindings: riscv: Add UltraRISC DP1000 bindings
> >       dt-bindings: pinctrl: Add UltraRISC DP1000 pinctrl bindings
> >       riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000
> >       pinctrl: ultrarisc: Add UltraRISC DP1000 pinctrl driver
> >       riscv: dts: ultrarisc: add Rongda M0 board device tree
> >       riscv: dts: ultrarisc: add Milk-V Titan board device tree
> >       riscv: defconfig: enable ARCH_ULTRARISC
> > 
> >  .../bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml | 168 ++++
> >  Documentation/devicetree/bindings/riscv/cpus.yaml  |   1 +
> >  .../devicetree/bindings/riscv/ultrarisc.yaml       |  27 +
> >  .../devicetree/bindings/vendor-prefixes.yaml       |   2 +
> >  MAINTAINERS                                        |  15 +
> >  arch/riscv/boot/dts/Makefile                       |   1 +
> >  arch/riscv/boot/dts/ultrarisc/Makefile             |   3 +
> >  .../dts/ultrarisc/dp1000-milkv-titan-pinctrl.dtsi  | 107 +++
> >  .../boot/dts/ultrarisc/dp1000-milkv-titan.dts      | 182 +++++
> >  .../dts/ultrarisc/dp1000-rongda-m0-pinctrl.dtsi    |  85 ++
> >  arch/riscv/boot/dts/ultrarisc/dp1000-rongda-m0.dts | 111 +++
> >  arch/riscv/boot/dts/ultrarisc/dp1000.dtsi          | 851 +++++++++++++++++++++
> >  arch/riscv/configs/defconfig                       |   1 +
> >  drivers/pinctrl/Kconfig                            |   1 +
> >  drivers/pinctrl/Makefile                           |   1 +
> >  drivers/pinctrl/ultrarisc/Kconfig                  |  23 +
> >  drivers/pinctrl/ultrarisc/Makefile                 |   4 +
> >  drivers/pinctrl/ultrarisc/pinctrl-dp1000.c         | 112 +++
> >  drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.c      | 746 ++++++++++++++++++
> >  drivers/pinctrl/ultrarisc/pinctrl-ultrarisc.h      |  71 ++
> >  .../dt-bindings/pinctrl/ultrarisc,dp1000-pinctrl.h |  65 ++
> >  21 files changed, 2577 insertions(+)
> > ---
> > base-commit: 50897c955902c93ae71c38698abb910525ebdc89
> > change-id: 20260316-ultrarisc-pinctrl-efa6e24c4803
> > 
> > Best regards,
> > --  
> > Jia Wang <wangjia@ultrarisc.com>
> >

Re: [PATCH 0/9] riscv: ultrarisc: add DP1000 SoC DT and pinctrl support

Posted by Conor Dooley 3 weeks, 1 day ago

On Thu, May 21, 2026 at 05:52:34PM +0800, Jia Wang wrote:
> > Additionally, these pinctrl patches should be sent standalone to the
> > pinctrl maintainers, they're likely to go through lots of revisions and
> > a different maintainer applies them.
> > 
> 
> Just to confirm — for v2, should I completely remove the pinctrl
> binding/driver from this series and send them as a standalone pinctrl
> series, while keeping only the pinctrl references in the DTS?

IMO yes. And cite a link to the pinctrl patches in your cover letter.

Probably you're better off submitting v2 of pinctrl as a higher priority
anyway, since a) the biggest changes are needed there and b) the dts
changes depend on a clock driver/binding being created.

Re: [PATCH 0/9] riscv: ultrarisc: add DP1000 SoC DT and pinctrl support

Posted by Jia Wang 3 weeks ago

On 2026-05-21 11:23 +0100, Conor Dooley wrote:
> On Thu, May 21, 2026 at 05:52:34PM +0800, Jia Wang wrote:
> > > Additionally, these pinctrl patches should be sent standalone to the
> > > pinctrl maintainers, they're likely to go through lots of revisions and
> > > a different maintainer applies them.
> > > 
> > 
> > Just to confirm — for v2, should I completely remove the pinctrl
> > binding/driver from this series and send them as a standalone pinctrl
> > series, while keeping only the pinctrl references in the DTS?
> 
> IMO yes. And cite a link to the pinctrl patches in your cover letter.
> 
> Probably you're better off submitting v2 of pinctrl as a higher priority
> anyway, since a) the biggest changes are needed there and b) the dts
> changes depend on a clock driver/binding being created.

Thanks, that's clear.

I’ll prioritize submitting the pinctrl driver/binding and the clock
driver/binding as separate series first. The DTS updates will follow
once those are in place.

Thanks again for the guidance.

Best Regards,
Jia Wang