While trying to get Raspberry Pi display v1.1 working on Beagleboard
platforms, I noticed various small issues with the tc358762 driver.
The series also contains a patch to fix the timings in the
powertip,ph800480t013-idf02 panel. The combination of tc358762 +
ph800480t013 is used in the Raspberry Pi display module, so it makes
sense to fix them together.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
---
Changes in v3:
- Add missing #include <linux/bitfield.h>
- New patch: "drm/panel-simple: Fix powertip,ph800480t013-idf02 timings"
- Link to v2: https://lore.kernel.org/r/20260327-tc358762-fixes-v2-0-3589d3c45f4a@ideasonboard.com
Changes in v2:
- Always enable VTG. There should be no downside, and it fixes unstable
hsync
- Add four new patches at the end
- Extend the patch desc in "Drop SPICMR write" a bit
- Link to v1: https://lore.kernel.org/r/20260326-tc358762-fixes-v1-0-65f479227af5@ideasonboard.com
---
Tomi Valkeinen (13):
drm/bridge: tc358762: Clean up register defines
drm/bridge: tc358762: Improve SYSCTRL register defines
drm/bridge: tc358762: Improve LCDCTRL defines
drm/bridge: tc358762: Configure SYSCTRL first
drm/bridge: tc358762: Drop SPICMR write
drm/bridge: tc358762: Improve DPI enable handling
drm/bridge: tc358762: Update comment about the number of lanes
drm/bridge: tc358762: Support VTG
drm/bridge: tc358762: Fix sync polarities
drm/bridge: tc358762: Move tc358762_init() into tc358762_enable()
drm/bridge: tc358762: Drop drm_bridge_funcs.mode_set
drm/bridge: tc358762: Set DE_POL and DCLK_POL properly
drm/panel-simple: Fix powertip,ph800480t013-idf02 timings
drivers/gpu/drm/bridge/tc358762.c | 203 +++++++++++++++++++++++------------
drivers/gpu/drm/panel/panel-simple.c | 14 +--
2 files changed, 144 insertions(+), 73 deletions(-)
---
base-commit: 11439c4635edd669ae435eec308f4ab8a0804808
change-id: 20260326-tc358762-fixes-6f666500da9e
Best regards,
--
Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>