This patchset adds support for T-Head TH1520's USB functionality, and
enabled it on the Lichee Pi 4A board.

The first 3 patches add support for the MISC subsystem clock
contrtoller, which contains some USB clocks.

The next 2 patches add support for the USB PHY of T-Head TH1520, which
is a wrapped Synopsys USB3.0 FemtoPHY with a little integration quirk;
the controller itself is a properly configured DWC3 controller with sane
default register values set.

Then one patch adds the USB PHY and controller nodes to the TH1520 DTSI
file.

The remaining half of this patchset dedicates to enablement of USB on
TH1520, because of the onboard hub of that board -- its USB2 signals are
behind a switch that needs to be toggled on, and Vbus supplies for both
the hub itself and downstream ports are managed via I2C-expanded GPIOs
(because the SoC does not have enough GPIO pins).

Emil Renner Berthing (1):
  riscv: dts: thead: Add Lichee Pi 4A IO expansions

Icenowy Zheng (10):
  dt-bindings: clock: thead: add TH1520 MISC subsys clock controller
  clk: thead: th1520-ap: add support for MISC subsys clocks
  riscv: dts: thead: add device tree node for MISC clock controller
  dt-bindings: phy: add binding for T-Head TH1520 USB PHY
  phy: add a driver for T-Head TH1520 USB PHY
  riscv: dts: thead: add device nodes for USB
  dt-bindings: gpio: dwapb: allow GPIO hogs
  dt-bindings: usb: vialab,vl817: allow ports property
  riscv: dts: thead: lpi4a: sort nodes
  riscv: dts: thead: enable USB3 ports on Lichee Pi 4A

Thomas Bonnefille (1):
  riscv: dts: thead: Add TH1520 I2C nodes

 .../bindings/clock/thead,th1520-clk-ap.yaml   |   5 +-
 .../bindings/gpio/snps,dw-apb-gpio.yaml       |   6 +
 .../bindings/phy/thead,th1520-usb-phy.yaml    |  74 ++++
 .../devicetree/bindings/usb/vialab,vl817.yaml |   4 +-
 .../dts/thead/th1520-lichee-module-4a.dtsi    |  15 +
 .../boot/dts/thead/th1520-lichee-pi-4a.dts    | 362 +++++++++++++++++-
 arch/riscv/boot/dts/thead/th1520.dtsi         | 106 ++++-
 drivers/clk/thead/clk-th1520-ap.c             |  64 ++++
 drivers/phy/Kconfig                           |   1 +
 drivers/phy/Makefile                          |   1 +
 drivers/phy/thead/Kconfig                     |  12 +
 drivers/phy/thead/Makefile                    |   2 +
 drivers/phy/thead/phy-th1520-usb.c            | 197 ++++++++++
 .../dt-bindings/clock/thead,th1520-clk-ap.h   |  10 +
 14 files changed, 840 insertions(+), 19 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/thead,th1520-usb-phy.yaml
 create mode 100644 drivers/phy/thead/Kconfig
 create mode 100644 drivers/phy/thead/Makefile
 create mode 100644 drivers/phy/thead/phy-th1520-usb.c

-- 
2.52.0

On Thu, May 07, 2026 at 04:16:58PM +0800, Icenowy Zheng wrote:
> This patchset adds support for T-Head TH1520's USB functionality, and
> enabled it on the Lichee Pi 4A board.
> 
> The first 3 patches add support for the MISC subsystem clock
> contrtoller, which contains some USB clocks.
> 
> The next 2 patches add support for the USB PHY of T-Head TH1520, which
> is a wrapped Synopsys USB3.0 FemtoPHY with a little integration quirk;
> the controller itself is a properly configured DWC3 controller with sane
> default register values set.
> 
> Then one patch adds the USB PHY and controller nodes to the TH1520 DTSI
> file.
> 
> The remaining half of this patchset dedicates to enablement of USB on
> TH1520, because of the onboard hub of that board -- its USB2 signals are
> behind a switch that needs to be toggled on, and Vbus supplies for both
> the hub itself and downstream ports are managed via I2C-expanded GPIOs
> (because the SoC does not have enough GPIO pins).

Hi, thanks for working on USB. I tried to apply it to next-20260601 and
several of the dts patches no longer apply cleanly. Could you rebase?

In the meantime, I'll apply to 7.1-rc7 for testing.

Thanks,
Drew

在 2026-06-08一的 21:17 -0700，Drew Fustini写道：
> On Thu, May 07, 2026 at 04:16:58PM +0800, Icenowy Zheng wrote:
> > This patchset adds support for T-Head TH1520's USB functionality,
> > and
> > enabled it on the Lichee Pi 4A board.
> > 
> > The first 3 patches add support for the MISC subsystem clock
> > contrtoller, which contains some USB clocks.
> > 
> > The next 2 patches add support for the USB PHY of T-Head TH1520,
> > which
> > is a wrapped Synopsys USB3.0 FemtoPHY with a little integration
> > quirk;
> > the controller itself is a properly configured DWC3 controller with
> > sane
> > default register values set.
> > 
> > Then one patch adds the USB PHY and controller nodes to the TH1520
> > DTSI
> > file.
> > 
> > The remaining half of this patchset dedicates to enablement of USB
> > on
> > TH1520, because of the onboard hub of that board -- its USB2
> > signals are
> > behind a switch that needs to be toggled on, and Vbus supplies for
> > both
> > the hub itself and downstream ports are managed via I2C-expanded
> > GPIOs
> > (because the SoC does not have enough GPIO pins).
> 
> Hi, thanks for working on USB. I tried to apply it to next-20260601
> and
> several of the dts patches no longer apply cleanly. Could you rebase?

I think the reason is that one of the GPIO expansion chip is added to
the DT for enabling Wi-Fi.

I am not sure whether the next revision of this patchset will contain
all things, maybe I will split out at least the USB PHY part.

Thanks,
Icenowy

> 
> In the meantime, I'll apply to 7.1-rc7 for testing.
> 
> Thanks,
> Drew

On Tue, Jun 09, 2026 at 01:10:41PM +0800, Icenowy Zheng wrote:
> 在 2026-06-08一的 21:17 -0700，Drew Fustini写道：
> > On Thu, May 07, 2026 at 04:16:58PM +0800, Icenowy Zheng wrote:
> > > This patchset adds support for T-Head TH1520's USB functionality,
> > > and
> > > enabled it on the Lichee Pi 4A board.
> > > 
> > > The first 3 patches add support for the MISC subsystem clock
> > > contrtoller, which contains some USB clocks.
> > > 
> > > The next 2 patches add support for the USB PHY of T-Head TH1520,
> > > which
> > > is a wrapped Synopsys USB3.0 FemtoPHY with a little integration
> > > quirk;
> > > the controller itself is a properly configured DWC3 controller with
> > > sane
> > > default register values set.
> > > 
> > > Then one patch adds the USB PHY and controller nodes to the TH1520
> > > DTSI
> > > file.
> > > 
> > > The remaining half of this patchset dedicates to enablement of USB
> > > on
> > > TH1520, because of the onboard hub of that board -- its USB2
> > > signals are
> > > behind a switch that needs to be toggled on, and Vbus supplies for
> > > both
> > > the hub itself and downstream ports are managed via I2C-expanded
> > > GPIOs
> > > (because the SoC does not have enough GPIO pins).
> > 
> > Hi, thanks for working on USB. I tried to apply it to next-20260601
> > and
> > several of the dts patches no longer apply cleanly. Could you rebase?
> 
> I think the reason is that one of the GPIO expansion chip is added to
> the DT for enabling Wi-Fi.

Yeah, I tried to resolve the conflicts but I'm not sure what the correct
resolution is.

a20241c08385 ("riscv: dts: thead: Enable WiFi on Lichee Pi 4A") adds
'clock-frquency = <400000>' to &i2c1 while this series instead sets
'clock-frequency = <100000>'. That commit also sets i2c1_pins
'bias-pull-up = <2100>' while this series sets bias-disable.

> I am not sure whether the next revision of this patchset will contain
> all things, maybe I will split out at least the USB PHY part.

I think splitting out would work, too.

Thanks,
Drew

On Thu, 07 May 2026 16:16:58 +0800, Icenowy Zheng wrote:
> This patchset adds support for T-Head TH1520's USB functionality, and
> enabled it on the Lichee Pi 4A board.
> 
> The first 3 patches add support for the MISC subsystem clock
> contrtoller, which contains some USB clocks.
> 
> The next 2 patches add support for the USB PHY of T-Head TH1520, which
> is a wrapped Synopsys USB3.0 FemtoPHY with a little integration quirk;
> the controller itself is a properly configured DWC3 controller with sane
> default register values set.
> 
> [...]

Applied, thanks!

[07/12] dt-bindings: gpio: dwapb: allow GPIO hogs
        https://git.kernel.org/brgl/c/f76c8be440e53465a306c95a7d50ca8675252f82

Best regards,
-- 
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>