[PATCH v3 0/4] Add minimal boot support for Qualcomm IPQ9650 SoC

Kathiravan Thirumoorthy posted 4 patches 1 month ago
There is a newer version of this series
Documentation/devicetree/bindings/arm/qcom.yaml    |    5 +
.../bindings/clock/qcom,ipq9650-gcc.yaml           |   68 +
arch/arm64/boot/dts/qcom/Makefile                  |    1 +
arch/arm64/boot/dts/qcom/ipq9650-rdp488.dts        |   79 +
arch/arm64/boot/dts/qcom/ipq9650.dtsi              |  377 +++
drivers/clk/qcom/Kconfig                           |   10 +
drivers/clk/qcom/Makefile                          |    1 +
drivers/clk/qcom/gcc-ipq9650.c                     | 3445 ++++++++++++++++++++
include/dt-bindings/clock/qcom,ipq9650-gcc.h       |  172 +
include/dt-bindings/reset/qcom,ipq9650-gcc.h       |  215 ++
10 files changed, 4373 insertions(+)
[PATCH v3 0/4] Add minimal boot support for Qualcomm IPQ9650 SoC
Posted by Kathiravan Thirumoorthy 1 month ago
Qualcomm IPQ9650 is a networking SoC targeted at routers, gateways, and
access points. This change adds minimal support required to boot the
IPQ9650 RDP488 board.

Compared to earlier IPQ SoCs, IPQ9650 features a heterogeneous CPU
configuration with four Cortex-A55 cores and one Cortex-A78 core, a
2 MB shared L3 cache, SMMU support, IPCC, five PCIe Gen3 controllers,
an integrated CDSP for task offloading, enhanced PPE capabilities,
and DDR5 memory support.

More information can be found at the product page:
https://docs.qualcomm.com/doc/87-96766-1/87-96766-1_REV_AA_Qualcomm_Dragonwing_NPro_A8_Elite_Platform_Product_Brief.pdf

Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
---
Changes in v3:
- Added \n before the status property
- Rebased on next-20260507
- Dropped the REFGEN, PRIMESS clocks from the bindings and the GCC
  driver since the ownership of these clocks are in discussion. It will
  be added back if Linux needs to play with those clocks.
- Link to v2:
  https://lore.kernel.org/all/20260429-ipq9650_boot_to_shell-v2-0-9b0dc3d1f3a8@oss.qualcomm.com/
Changes in v2:
- Collected the R-b tags
- Add the ARM64 dependency to the GCC driver and enable it by default to
  align with Krzysztof's effort to cleanup the defconfig
- Updated the GICv3 interrupt-cells to 4 and added the ppi-partitions
  and hooked up with the PMU instances.
- Made the labels to lower case and kept the \n before status property
- Dropped the defconfig patch
- Link to v1: https://patch.msgid.link/20260415-ipq9650_boot_to_shell-v1-0-b37eb4c3a1d1@oss.qualcomm.com

---
Kathiravan Thirumoorthy (4):
      dt-bindings: clock: add Qualcomm IPQ9650 GCC
      clk: qcom: add Global Clock controller (GCC) driver for IPQ9650 SoC
      dt-bindings: qcom: add IPQ9650 boards
      arm64: dts: qcom: add IPQ9650 SoC and rdp488 board support

 Documentation/devicetree/bindings/arm/qcom.yaml    |    5 +
 .../bindings/clock/qcom,ipq9650-gcc.yaml           |   68 +
 arch/arm64/boot/dts/qcom/Makefile                  |    1 +
 arch/arm64/boot/dts/qcom/ipq9650-rdp488.dts        |   79 +
 arch/arm64/boot/dts/qcom/ipq9650.dtsi              |  377 +++
 drivers/clk/qcom/Kconfig                           |   10 +
 drivers/clk/qcom/Makefile                          |    1 +
 drivers/clk/qcom/gcc-ipq9650.c                     | 3445 ++++++++++++++++++++
 include/dt-bindings/clock/qcom,ipq9650-gcc.h       |  172 +
 include/dt-bindings/reset/qcom,ipq9650-gcc.h       |  215 ++
 10 files changed, 4373 insertions(+)
---
base-commit: 17c7841d09ee7d33557fd075562d9289b6018c90
change-id: 20260330-ipq9650_boot_to_shell-159027d548cc

Best regards,
--  
Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Re: (subset) [PATCH v3 0/4] Add minimal boot support for Qualcomm IPQ9650 SoC
Posted by Bjorn Andersson 1 month ago
On Thu, 07 May 2026 22:38:26 +0530, Kathiravan Thirumoorthy wrote:
> Qualcomm IPQ9650 is a networking SoC targeted at routers, gateways, and
> access points. This change adds minimal support required to boot the
> IPQ9650 RDP488 board.
> 
> Compared to earlier IPQ SoCs, IPQ9650 features a heterogeneous CPU
> configuration with four Cortex-A55 cores and one Cortex-A78 core, a
> 2 MB shared L3 cache, SMMU support, IPCC, five PCIe Gen3 controllers,
> an integrated CDSP for task offloading, enhanced PPE capabilities,
> and DDR5 memory support.
> 
> [...]

Applied, thanks!

[3/4] dt-bindings: qcom: add IPQ9650 boards
      commit: 5bfa2c53c675610110c797e1f17c87ce25424407
[4/4] arm64: dts: qcom: add IPQ9650 SoC and rdp488 board support
      commit: 8cef25a0044d3e7caef56a43bf316336fe39b5d8

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>