[PATCH v2 0/5] Add LPASS LPI pin controller support for SM6350

Luca Weiss posted 5 patches 1 month, 2 weeks ago
.../pinctrl/qcom,sm6350-lpass-lpi-pinctrl.yaml     | 124 +++++++++++++++++
arch/arm64/boot/dts/qcom/sm6350.dtsi               |  66 +++++++++
arch/arm64/configs/defconfig                       |   1 +
drivers/pinctrl/qcom/Kconfig                       |   9 ++
drivers/pinctrl/qcom/Makefile                      |   1 +
drivers/pinctrl/qcom/pinctrl-lpass-lpi.c           |   2 +
drivers/pinctrl/qcom/pinctrl-lpass-lpi.h           |  20 +++
drivers/pinctrl/qcom/pinctrl-sm6350-lpass-lpi.c    | 149 +++++++++++++++++++++
8 files changed, 372 insertions(+)
[PATCH v2 0/5] Add LPASS LPI pin controller support for SM6350
Posted by Luca Weiss 1 month, 2 weeks ago
Introduce support for the LPASS LPI pin controller for the Qualcomm
SM6350 SoC, by adding the dt-bindings, driver, dts bits and enabling it
in the arm64 defconfig.

The custom slew offset for gpio14 is described as
"qcom,lpi-slew-base-tbl" in the downstream dts[0]. I've tried to find
some reasonable solution to have this handled correctly in the patches
here, but suggestions are welcome how to improve the situation. There's
of course several ways to implement a solution for this.

[0] https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-extra/devicetree/+/refs/heads/kernel/13/fp4/qcom/lagoon-lpi.dtsi#25

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Changes in v2:
- Fix dt bindings example
- Drop note about too little register space (Konrad)
- Pick up tags
- Link to v1: https://lore.kernel.org/r/20260128-sm6350-lpi-tlmm-v1-0-36583f2a2a2a@fairphone.com

---
Luca Weiss (5):
      dt-bindings: pinctrl: qcom: Add SM6350 LPI pinctrl
      pinctrl: qcom: lpass-lpi: Add ability to use SPARE_1 for slew control
      pinctrl: qcom: Add SM6350 LPASS LPI TLMM
      arm64: dts: qcom: sm6350: add LPASS LPI pin controller
      arm64: defconfig: Enable LPASS LPI pin controller for SM6350

 .../pinctrl/qcom,sm6350-lpass-lpi-pinctrl.yaml     | 124 +++++++++++++++++
 arch/arm64/boot/dts/qcom/sm6350.dtsi               |  66 +++++++++
 arch/arm64/configs/defconfig                       |   1 +
 drivers/pinctrl/qcom/Kconfig                       |   9 ++
 drivers/pinctrl/qcom/Makefile                      |   1 +
 drivers/pinctrl/qcom/pinctrl-lpass-lpi.c           |   2 +
 drivers/pinctrl/qcom/pinctrl-lpass-lpi.h           |  20 +++
 drivers/pinctrl/qcom/pinctrl-sm6350-lpass-lpi.c    | 149 +++++++++++++++++++++
 8 files changed, 372 insertions(+)
---
base-commit: 3d33d10c2d4f964c9223fd9a27eb7f0ac733c216
change-id: 20260128-sm6350-lpi-tlmm-bdca4deb5641

Best regards,
--  
Luca Weiss <luca.weiss@fairphone.com>
Re: [PATCH v2 0/5] Add LPASS LPI pin controller support for SM6350
Posted by Linus Walleij 1 month, 1 week ago
On Thu, Apr 30, 2026 at 9:10 AM Luca Weiss <luca.weiss@fairphone.com> wrote:

> Introduce support for the LPASS LPI pin controller for the Qualcomm
> SM6350 SoC, by adding the dt-bindings, driver, dts bits and enabling it
> in the arm64 defconfig.
>
> The custom slew offset for gpio14 is described as
> "qcom,lpi-slew-base-tbl" in the downstream dts[0]. I've tried to find
> some reasonable solution to have this handled correctly in the patches
> here, but suggestions are welcome how to improve the situation. There's
> of course several ways to implement a solution for this.
>
> [0] https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-extra/devicetree/+/refs/heads/kernel/13/fp4/qcom/lagoon-lpi.dtsi#25
>
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

Fixed up Kconfig text and applied patches 1, 2 and 3 to the pinctrl tree.

Please funnel patches 4 & 5 through the SoC tree (Bjorn Andersson,
I think.)

Yours,
Linus Walleij
Re: [PATCH v2 0/5] Add LPASS LPI pin controller support for SM6350
Posted by Luca Weiss 1 month, 1 week ago
On Tue May 5, 2026 at 12:35 PM CEST, Linus Walleij wrote:
> On Thu, Apr 30, 2026 at 9:10 AM Luca Weiss <luca.weiss@fairphone.com> wrote:
>
>> Introduce support for the LPASS LPI pin controller for the Qualcomm
>> SM6350 SoC, by adding the dt-bindings, driver, dts bits and enabling it
>> in the arm64 defconfig.
>>
>> The custom slew offset for gpio14 is described as
>> "qcom,lpi-slew-base-tbl" in the downstream dts[0]. I've tried to find
>> some reasonable solution to have this handled correctly in the patches
>> here, but suggestions are welcome how to improve the situation. There's
>> of course several ways to implement a solution for this.
>>
>> [0] https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-extra/devicetree/+/refs/heads/kernel/13/fp4/qcom/lagoon-lpi.dtsi#25
>>
>> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
>
> Fixed up Kconfig text and applied patches 1, 2 and 3 to the pinctrl tree.
>
> Please funnel patches 4 & 5 through the SoC tree (Bjorn Andersson,
> I think.)

Great, thank you!
Re: (subset) [PATCH v2 0/5] Add LPASS LPI pin controller support for SM6350
Posted by Bjorn Andersson 1 month ago
On Thu, 30 Apr 2026 09:10:40 +0200, Luca Weiss wrote:
> Introduce support for the LPASS LPI pin controller for the Qualcomm
> SM6350 SoC, by adding the dt-bindings, driver, dts bits and enabling it
> in the arm64 defconfig.
> 
> The custom slew offset for gpio14 is described as
> "qcom,lpi-slew-base-tbl" in the downstream dts[0]. I've tried to find
> some reasonable solution to have this handled correctly in the patches
> here, but suggestions are welcome how to improve the situation. There's
> of course several ways to implement a solution for this.
> 
> [...]

Applied, thanks!

[4/5] arm64: dts: qcom: sm6350: add LPASS LPI pin controller
      commit: 630398127110753474576cbc0cd4ad102b18005e
[5/5] arm64: defconfig: Enable LPASS LPI pin controller for SM6350
      commit: b1b08554e3be97712febad9d4d9ad617a1a32af1

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>