[PATCH v2 0/2] pinctrl: qcom: eliza: Split up some QUP pin groups

Alexander Koskovich posted 2 patches 1 month, 3 weeks ago
.../bindings/pinctrl/qcom,eliza-tlmm.yaml          |  13 +-
drivers/pinctrl/qcom/pinctrl-eliza.c               | 200 +++++++++++++++++----
2 files changed, 179 insertions(+), 34 deletions(-)
[PATCH v2 0/2] pinctrl: qcom: eliza: Split up some QUP pin groups
Posted by Alexander Koskovich 1 month, 3 weeks ago
Multiple QUPs have lanes that can be routed to one of two GPIOs and
collapsing them prevents devicetrees from requesting specific routing.

For example, a board that wires an I2C SCL line to one of two GPIOs
cannot request that specific pin with the groups collapsed.

This series splits them up so devicetrees can request the configuration
they need.

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
Changes in v2:
- Update bindings to reflect new split functions
- Link to v1: https://lore.kernel.org/r/20260418-fix-eliza-pinctrl-v1-1-864bf95ac83b@pm.me

---
Alexander Koskovich (2):
      dt-bindings: pinctrl: qcom,eliza-tlmm: Update function list
      pinctrl: qcom: eliza: Split up some QUP pin groups

 .../bindings/pinctrl/qcom,eliza-tlmm.yaml          |  13 +-
 drivers/pinctrl/qcom/pinctrl-eliza.c               | 200 +++++++++++++++++----
 2 files changed, 179 insertions(+), 34 deletions(-)
---
base-commit: c7275b05bc428c7373d97aa2da02d3a7fa6b9f66
change-id: 20260418-fix-eliza-pinctrl-b6e66dd92766

Best regards,
-- 
Alexander Koskovich <akoskovich@pm.me>
Re: [PATCH v2 0/2] pinctrl: qcom: eliza: Split up some QUP pin groups
Posted by Abel Vesa 1 month, 3 weeks ago
On 26-04-20 14:27:46, Alexander Koskovich wrote:
> Multiple QUPs have lanes that can be routed to one of two GPIOs and
> collapsing them prevents devicetrees from requesting specific routing.
> 
> For example, a board that wires an I2C SCL line to one of two GPIOs
> cannot request that specific pin with the groups collapsed.
> 
> This series splits them up so devicetrees can request the configuration
> they need.
> 
> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>

Nack. That's the downstream way. In upstream we group them.

If you want to play with the WIP bring-up, here is the tree we use:

https://github.com/qualcomm-linux/kernel-topics/tree/early/hwe/eliza

Qup nodes are already in there.
Re: [PATCH v2 0/2] pinctrl: qcom: eliza: Split up some QUP pin groups
Posted by Alexander Koskovich 1 month, 3 weeks ago
On Tuesday, April 21st, 2026 at 1:55 AM, Abel Vesa <abel.vesa@oss.qualcomm.com> wrote:

> On 26-04-20 14:27:46, Alexander Koskovich wrote:
> > Multiple QUPs have lanes that can be routed to one of two GPIOs and
> > collapsing them prevents devicetrees from requesting specific routing.
> >
> > For example, a board that wires an I2C SCL line to one of two GPIOs
> > cannot request that specific pin with the groups collapsed.
> >
> > This series splits them up so devicetrees can request the configuration
> > they need.
> >
> > Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
> 
> Nack. That's the downstream way. In upstream we group them.

If I leave them grouped, and don't override function for i2c6 scl to
qup1_se6_l1_mira, probe fails for the amplifiers on my board.

Is there a way to select mira with having them grouped?

> 
> If you want to play with the WIP bring-up, here is the tree we use:
> 
> https://github.com/qualcomm-linux/kernel-topics/tree/early/hwe/eliza
> 
> Qup nodes are already in there.
> 

Thanks,
Alex