drivers/gpu/drm/msm/adreno/adreno_gpu.c | 6 ++++++ 1 file changed, 6 insertions(+)
Before a5xx Adreno driver will not try fetching UBWC params (because
those generations didn't support UBWC anyway), however it's still
possible to query UBWC-related params from the userspace, triggering
possible NULL pointer dereference. Check for UBWC config in
adreno_get_param() and return sane defaults if there is none.
Fixes: a452510aad53 ("drm/msm/adreno: Switch to the common UBWC config struct")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
Changes in v2:
- Changed adreno_get_param() return -ENOENT for affected params (Rob)
- Link to v1: https://patch.msgid.link/20260407-adreno-fix-ubwc-v1-1-bb2b09450b87@oss.qualcomm.com
---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index d5fe6f6f0dec..34e4ab43b0f6 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -426,15 +426,21 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx,
*value = vm->mm_range;
return 0;
case MSM_PARAM_HIGHEST_BANK_BIT:
+ if (!adreno_gpu->ubwc_config)
+ return -ENOENT;
*value = adreno_gpu->ubwc_config->highest_bank_bit;
return 0;
case MSM_PARAM_RAYTRACING:
*value = adreno_gpu->has_ray_tracing;
return 0;
case MSM_PARAM_UBWC_SWIZZLE:
+ if (!adreno_gpu->ubwc_config)
+ return -ENOENT;
*value = adreno_gpu->ubwc_config->ubwc_swizzle;
return 0;
case MSM_PARAM_MACROTILE_MODE:
+ if (!adreno_gpu->ubwc_config)
+ return -ENOENT;
*value = adreno_gpu->ubwc_config->macrotile_mode;
return 0;
case MSM_PARAM_UCHE_TRAP_BASE:
---
base-commit: 36ece9697e89016181e5ae87510e40fb31d86f2b
change-id: 20260407-adreno-fix-ubwc-6a2564710e21
Best regards,
--
With best wishes
Dmitry
On 4/7/2026 8:53 AM, Dmitry Baryshkov wrote:
> Before a5xx Adreno driver will not try fetching UBWC params (because
> those generations didn't support UBWC anyway), however it's still
> possible to query UBWC-related params from the userspace, triggering
> possible NULL pointer dereference. Check for UBWC config in
> adreno_get_param() and return sane defaults if there is none.
>
> Fixes: a452510aad53 ("drm/msm/adreno: Switch to the common UBWC config struct")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
-Akhil
> ---
> Changes in v2:
> - Changed adreno_get_param() return -ENOENT for affected params (Rob)
> - Link to v1: https://patch.msgid.link/20260407-adreno-fix-ubwc-v1-1-bb2b09450b87@oss.qualcomm.com
> ---
> drivers/gpu/drm/msm/adreno/adreno_gpu.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> index d5fe6f6f0dec..34e4ab43b0f6 100644
> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> @@ -426,15 +426,21 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx,
> *value = vm->mm_range;
> return 0;
> case MSM_PARAM_HIGHEST_BANK_BIT:
> + if (!adreno_gpu->ubwc_config)
> + return -ENOENT;
> *value = adreno_gpu->ubwc_config->highest_bank_bit;
> return 0;
> case MSM_PARAM_RAYTRACING:
> *value = adreno_gpu->has_ray_tracing;
> return 0;
> case MSM_PARAM_UBWC_SWIZZLE:
> + if (!adreno_gpu->ubwc_config)
> + return -ENOENT;
> *value = adreno_gpu->ubwc_config->ubwc_swizzle;
> return 0;
> case MSM_PARAM_MACROTILE_MODE:
> + if (!adreno_gpu->ubwc_config)
> + return -ENOENT;
> *value = adreno_gpu->ubwc_config->macrotile_mode;
> return 0;
> case MSM_PARAM_UCHE_TRAP_BASE:
>
> ---
> base-commit: 36ece9697e89016181e5ae87510e40fb31d86f2b
> change-id: 20260407-adreno-fix-ubwc-6a2564710e21
>
> Best regards,
> --
> With best wishes
> Dmitry
>
On Tue, Apr 7, 2026 at 12:17 PM Akhil P Oommen <akhilpo@oss.qualcomm.com> wrote:
>
> On 4/7/2026 8:53 AM, Dmitry Baryshkov wrote:
> > Before a5xx Adreno driver will not try fetching UBWC params (because
> > those generations didn't support UBWC anyway), however it's still
> > possible to query UBWC-related params from the userspace, triggering
> > possible NULL pointer dereference. Check for UBWC config in
> > adreno_get_param() and return sane defaults if there is none.
> >
> > Fixes: a452510aad53 ("drm/msm/adreno: Switch to the common UBWC config struct")
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>
> Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
>
> -Akhil
>
> > ---
> > Changes in v2:
> > - Changed adreno_get_param() return -ENOENT for affected params (Rob)
> > - Link to v1: https://patch.msgid.link/20260407-adreno-fix-ubwc-v1-1-bb2b09450b87@oss.qualcomm.com
> > ---
> > drivers/gpu/drm/msm/adreno/adreno_gpu.c | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> > index d5fe6f6f0dec..34e4ab43b0f6 100644
> > --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> > +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
> > @@ -426,15 +426,21 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_context *ctx,
> > *value = vm->mm_range;
> > return 0;
> > case MSM_PARAM_HIGHEST_BANK_BIT:
> > + if (!adreno_gpu->ubwc_config)
> > + return -ENOENT;
maybe use:
return UERR(ENOENT, dev, "no ubwc")
?
I've been trying to add UERR() to things to make it easier to debug
from userspace why the kernel returns various errors.
Otherwise, lgtm
BR,
-R
> > *value = adreno_gpu->ubwc_config->highest_bank_bit;
> > return 0;
> > case MSM_PARAM_RAYTRACING:
> > *value = adreno_gpu->has_ray_tracing;
> > return 0;
> > case MSM_PARAM_UBWC_SWIZZLE:
> > + if (!adreno_gpu->ubwc_config)
> > + return -ENOENT;
> > *value = adreno_gpu->ubwc_config->ubwc_swizzle;
> > return 0;
> > case MSM_PARAM_MACROTILE_MODE:
> > + if (!adreno_gpu->ubwc_config)
> > + return -ENOENT;
> > *value = adreno_gpu->ubwc_config->macrotile_mode;
> > return 0;
> > case MSM_PARAM_UCHE_TRAP_BASE:
> >
> > ---
> > base-commit: 36ece9697e89016181e5ae87510e40fb31d86f2b
> > change-id: 20260407-adreno-fix-ubwc-6a2564710e21
> >
> > Best regards,
> > --
> > With best wishes
> > Dmitry
> >
>
© 2016 - 2026 Red Hat, Inc.