In preparation to add a new Corstone-1000 variation with different CPUs,
move the CPU nodes into the specific platforms and out of the common
corstone1000.dtsi.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
arch/arm64/boot/dts/arm/corstone1000-fvp.dts | 54 ++++++++++++++++-----------
arch/arm64/boot/dts/arm/corstone1000-mps3.dts | 13 +++++++
arch/arm64/boot/dts/arm/corstone1000.dtsi | 13 -------
3 files changed, 45 insertions(+), 35 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/corstone1000-fvp.dts b/arch/arm64/boot/dts/arm/corstone1000-fvp.dts
index 66ba6b027193..e479c79c1ea7 100644
--- a/arch/arm64/boot/dts/arm/corstone1000-fvp.dts
+++ b/arch/arm64/boot/dts/arm/corstone1000-fvp.dts
@@ -48,30 +48,40 @@ sdmmc1: mmc@50000000 {
clocks = <&smbclk>, <&refclk100mhz>;
clock-names = "smclk", "apb_pclk";
};
-};
+ cpus: cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
-&cpus {
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a35";
- reg = <0x1>;
- enable-method = "psci";
- next-level-cache = <&L2_0>;
- };
+ cpu: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0 0>;
+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ };
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a35";
- reg = <0x2>;
- enable-method = "psci";
- next-level-cache = <&L2_0>;
- };
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0 0x1>;
+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0 0x2>;
+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ };
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a35";
- reg = <0x3>;
- enable-method = "psci";
- next-level-cache = <&L2_0>;
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0 0x3>;
+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ };
};
};
diff --git a/arch/arm64/boot/dts/arm/corstone1000-mps3.dts b/arch/arm64/boot/dts/arm/corstone1000-mps3.dts
index 10d265be0c02..adcfaf7c55b8 100644
--- a/arch/arm64/boot/dts/arm/corstone1000-mps3.dts
+++ b/arch/arm64/boot/dts/arm/corstone1000-mps3.dts
@@ -13,6 +13,19 @@ / {
model = "ARM Corstone1000 FPGA MPS3 board";
compatible = "arm,corstone1000-mps3";
+ cpus: cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0 0>;
+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ };
+ };
+
smsc: ethernet@4010000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x40100000 0x10000>;
diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dts/arm/corstone1000.dtsi
index f35a5c96f3da..4d57dc197918 100644
--- a/arch/arm64/boot/dts/arm/corstone1000.dtsi
+++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi
@@ -21,19 +21,6 @@ chosen {
stdout-path = "serial0:115200n8";
};
- cpus: cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a35";
- reg = <0>;
- enable-method = "psci";
- next-level-cache = <&L2_0>;
- };
- };
-
memory@88200000 {
device_type = "memory";
reg = <0x88200000 0x77e00000>;
--
2.51.0