From nobody Mon Apr 6 11:51:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0CF53D88EA; Fri, 20 Mar 2026 16:47:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774025258; cv=none; b=tls8++V/bz27NhuVi511NkzwKIDzJBVbFlCbMHhMzk3uIyl6ny1UhHg+kz3JK1o2ld2sAR505l9pQayIslQ6629w8XNF8ZR6TG/KMKed6L9Nn9VL0AhHven8DZHeKQapuUnAp9sRSExgG0Yq1Z3vQ+9pUFi08ydrvr9WyXq88Zs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774025258; c=relaxed/simple; bh=sK9Je7eEOHO0wb9I2WtylwKv1pOI57lliw+dQ40lnJo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lzYQF0Dei8Llp2ERLaZtjfKAMOoHsjkSBhMfYsfwMiALNXxrFqaTUQpsMO8jEllX95EPFxOj9VZEHHM5ImJ2YTKRpfwG+8W2EGCIDQtJN77qaqb1iolpnoQCw67Bppd/WYsuqv8UK3xML3CKrA/GdP2tNenVsFVn99BAAMzzDcY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=O/zzqxqk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="O/zzqxqk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E0B59C4CEF7; Fri, 20 Mar 2026 16:47:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774025258; bh=sK9Je7eEOHO0wb9I2WtylwKv1pOI57lliw+dQ40lnJo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=O/zzqxqk9VqjAANVq7YDdiaokLbu44P5/67s5HUnm/t8DTYF3xkcrspcDP2VXspvp o3+lHsw326285W/ymwngxI1IszpKN5dgfSCmvWQRruAqMauEH12zK4oz3Qvvv0VPGk p0eYTW2Ha7L4nPsqNqQpj4ibJfgQM6n/IjD0PotT+Jyi+uZu5xK/7EGiNCv96oEESs 27Hqm6XrZSCWcm4L/HZ8ZHnDR4BCFZO0R/yolmi2IjQY4RH8os2TPMGpDbg5udvDMZ fb08XC5LBsQw7YxYzA7bozLDJ43h7bAI9wn7jeisuw+bAspHfpZ64ycwQWQHpJG9f7 uRtu+aevcJ/Eg== From: "Rob Herring (Arm)" Date: Fri, 20 Mar 2026 11:47:16 -0500 Subject: [PATCH 3/5] arm64: dts: arm/corstone1000: Move cpu nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260320-dt-corstone1000-a320-v1-3-a549dfcfe8da@kernel.org> References: <20260320-dt-corstone1000-a320-v1-0-a549dfcfe8da@kernel.org> In-Reply-To: <20260320-dt-corstone1000-a320-v1-0-a549dfcfe8da@kernel.org> To: Krzysztof Kozlowski , Conor Dooley , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi Cc: Frazer Carsley , Hugues Kamba Mpiana , Abdellatif El Khlifi , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.15-dev In preparation to add a new Corstone-1000 variation with different CPUs, move the CPU nodes into the specific platforms and out of the common corstone1000.dtsi. Signed-off-by: Rob Herring (Arm) --- arch/arm64/boot/dts/arm/corstone1000-fvp.dts | 54 ++++++++++++++++-------= ---- arch/arm64/boot/dts/arm/corstone1000-mps3.dts | 13 +++++++ arch/arm64/boot/dts/arm/corstone1000.dtsi | 13 ------- 3 files changed, 45 insertions(+), 35 deletions(-) diff --git a/arch/arm64/boot/dts/arm/corstone1000-fvp.dts b/arch/arm64/boot= /dts/arm/corstone1000-fvp.dts index 66ba6b027193..e479c79c1ea7 100644 --- a/arch/arm64/boot/dts/arm/corstone1000-fvp.dts +++ b/arch/arm64/boot/dts/arm/corstone1000-fvp.dts @@ -48,30 +48,40 @@ sdmmc1: mmc@50000000 { clocks =3D <&smbclk>, <&refclk100mhz>; clock-names =3D "smclk", "apb_pclk"; }; -}; + cpus: cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; =20 -&cpus { - cpu1: cpu@1 { - device_type =3D "cpu"; - compatible =3D "arm,cortex-a35"; - reg =3D <0x1>; - enable-method =3D "psci"; - next-level-cache =3D <&L2_0>; - }; + cpu: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a35"; + reg =3D <0 0>; + enable-method =3D "psci"; + next-level-cache =3D <&L2_0>; + }; =20 - cpu2: cpu@2 { - device_type =3D "cpu"; - compatible =3D "arm,cortex-a35"; - reg =3D <0x2>; - enable-method =3D "psci"; - next-level-cache =3D <&L2_0>; - }; + cpu1: cpu@1 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a35"; + reg =3D <0 0x1>; + enable-method =3D "psci"; + next-level-cache =3D <&L2_0>; + }; + + cpu2: cpu@2 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a35"; + reg =3D <0 0x2>; + enable-method =3D "psci"; + next-level-cache =3D <&L2_0>; + }; =20 - cpu3: cpu@3 { - device_type =3D "cpu"; - compatible =3D "arm,cortex-a35"; - reg =3D <0x3>; - enable-method =3D "psci"; - next-level-cache =3D <&L2_0>; + cpu3: cpu@3 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a35"; + reg =3D <0 0x3>; + enable-method =3D "psci"; + next-level-cache =3D <&L2_0>; + }; }; }; diff --git a/arch/arm64/boot/dts/arm/corstone1000-mps3.dts b/arch/arm64/boo= t/dts/arm/corstone1000-mps3.dts index 10d265be0c02..adcfaf7c55b8 100644 --- a/arch/arm64/boot/dts/arm/corstone1000-mps3.dts +++ b/arch/arm64/boot/dts/arm/corstone1000-mps3.dts @@ -13,6 +13,19 @@ / { model =3D "ARM Corstone1000 FPGA MPS3 board"; compatible =3D "arm,corstone1000-mps3"; =20 + cpus: cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a35"; + reg =3D <0 0>; + enable-method =3D "psci"; + next-level-cache =3D <&L2_0>; + }; + }; + smsc: ethernet@4010000 { compatible =3D "smsc,lan9220", "smsc,lan9115"; reg =3D <0x40100000 0x10000>; diff --git a/arch/arm64/boot/dts/arm/corstone1000.dtsi b/arch/arm64/boot/dt= s/arm/corstone1000.dtsi index f35a5c96f3da..4d57dc197918 100644 --- a/arch/arm64/boot/dts/arm/corstone1000.dtsi +++ b/arch/arm64/boot/dts/arm/corstone1000.dtsi @@ -21,19 +21,6 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 - cpus: cpus { - #address-cells =3D <1>; - #size-cells =3D <0>; - - cpu: cpu@0 { - device_type =3D "cpu"; - compatible =3D "arm,cortex-a35"; - reg =3D <0>; - enable-method =3D "psci"; - next-level-cache =3D <&L2_0>; - }; - }; - memory@88200000 { device_type =3D "memory"; reg =3D <0x88200000 0x77e00000>; --=20 2.51.0