commit 767ae437a32d ("x86/mm: Add INVLPGB feature and Kconfig entry")
introduced support for the INVLPGB instruction as a fast TLB
invalidation mechanism. However, no corresponding CPU feature flag is
exposed via /proc/cpuinfo.

Add the "invlpgb" feature flag in arch/x86/include/asm/cpufeatures.h.
The flag is picked up by arch/x86/kernel/cpu/mkcapflags.sh and exported
through the x86_cap_flags array, making it visible in /proc/cpuinfo.

Signed-off-by: Yongting Lin <linyongting@bytedance.com>
---
 arch/x86/include/asm/cpufeatures.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index dbe104df339b..12f0a6610c93 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -332,7 +332,7 @@
 #define X86_FEATURE_CLZERO		(13*32+ 0) /* "clzero" CLZERO instruction */
 #define X86_FEATURE_IRPERF		(13*32+ 1) /* "irperf" Instructions Retired Count */
 #define X86_FEATURE_XSAVEERPTR		(13*32+ 2) /* "xsaveerptr" Always save/restore FP error pointers */
-#define X86_FEATURE_INVLPGB		(13*32+ 3) /* INVLPGB and TLBSYNC instructions supported */
+#define X86_FEATURE_INVLPGB		(13*32+ 3) /* "invlpgb" INVLPGB and TLBSYNC instructions supported */
 #define X86_FEATURE_RDPRU		(13*32+ 4) /* "rdpru" Read processor register at user level */
 #define X86_FEATURE_WBNOINVD		(13*32+ 9) /* "wbnoinvd" WBNOINVD instruction */
 #define X86_FEATURE_AMD_IBPB		(13*32+12) /* Indirect Branch Prediction Barrier */
-- 
2.39.5

On 3/18/26 10:52, Yongting Lin wrote:
> commit 767ae437a32d ("x86/mm: Add INVLPGB feature and Kconfig entry")
> introduced support for the INVLPGB instruction as a fast TLB
> invalidation mechanism. However, no corresponding CPU feature flag is
> exposed via /proc/cpuinfo.

The patch is probably OK, but the changelog is insufficient. Could you
please read through:

	Documentation/arch/x86/cpuinfo.rst

and use that structure to construct a justification for why this feature
is needed?

I'd also just appreciate a blurb on why you care. Why did you bother to
send this patch?

On Wed, 18 Mar 2026 10:58:26 -0700, Dave Hansen wrote:
>On 3/18/26 10:52, Yongting Lin wrote:
>> commit 767ae437a32d ("x86/mm: Add INVLPGB feature and Kconfig entry")
>> introduced support for the INVLPGB instruction as a fast TLB
>> invalidation mechanism. However, no corresponding CPU feature flag is
>> exposed via /proc/cpuinfo.
>
>The patch is probably OK, but the changelog is insufficient. Could you
>please read through:
>
>        Documentation/arch/x86/cpuinfo.rst
>
>and use that structure to construct a justification for why this feature
>is needed?

Hi Dave, the invlpgb is a new ISA for newly AMD processors to issue a BROADCAST
operation to invalidate TLB entry in all remote CPUS, avoiding a cost of
IPI tlb flush operations.

It should be visible to Linux user to be aware of this new feature as well
as application programs.

>
>I'd also just appreciate a blurb on why you care. Why did you bother to
send this patch?

Yes, I am back-porting this new feature to an old linux kernel and found
there is no CPU tag in the flags part of /proc/cpuinfo.

Thanks!

Yongting.

On Wed, Mar 18, 2026 at 11:23:41AM -0700, Yongting Lin wrote:
> Yes, I am back-porting this new feature to an old linux kernel and found
> there is no CPU tag in the flags part of /proc/cpuinfo.

First read the doc Dave pointed to, please.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

On 3/18/26 11:23, Yongting Lin wrote:
> On Wed, 18 Mar 2026 10:58:26 -0700, Dave Hansen wrote:
>> On 3/18/26 10:52, Yongting Lin wrote:
>>> commit 767ae437a32d ("x86/mm: Add INVLPGB feature and Kconfig entry")
>>> introduced support for the INVLPGB instruction as a fast TLB
>>> invalidation mechanism. However, no corresponding CPU feature flag is
>>> exposed via /proc/cpuinfo.
>>
>> The patch is probably OK, but the changelog is insufficient. Could you
>> please read through:
>>
>>        Documentation/arch/x86/cpuinfo.rst
>>
>> and use that structure to construct a justification for why this feature
>> is needed?
> 
> Hi Dave, the invlpgb is a new ISA for newly AMD processors to issue a BROADCAST
> operation to invalidate TLB entry in all remote CPUS, avoiding a cost of
> IPI tlb flush operations.

Heh, thanks for the background.

> It should be visible to Linux user to be aware of this new feature as well
> as application programs.

I get it. But this doesn't tell me *why*.

Did you happen to read the documentation I referenced above and asked
you to read? I was hoping after you read it, you would understand which
kinds of features we want in /proc/cpuinfo and which ones we don't.
Then, you would be prepared to make a strong case for *why*.