[PATCH v13 0/5] PolarFire SoC GPIO interrupt support

Conor Dooley posted 5 patches 2 weeks, 5 days ago
.../bindings/gpio/microchip,mpfs-gpio.yaml    |  24 ++-
.../soc/microchip/microchip,mpfs-irqmux.yaml  | 103 ++++++++++
.../microchip,mpfs-mss-top-sysreg.yaml        |   4 +
MAINTAINERS                                   |   2 +-
.../boot/dts/microchip/mpfs-beaglev-fire.dts  |  29 +++
.../boot/dts/microchip/mpfs-disco-kit.dts     |  43 +++--
.../dts/microchip/mpfs-icicle-kit-common.dtsi |  37 +++-
.../boot/dts/microchip/mpfs-m100pfsevp.dts    |  41 ++--
.../boot/dts/microchip/mpfs-polarberry.dts    |  29 +++
.../riscv/boot/dts/microchip/mpfs-sev-kit.dts |  37 +++-
.../riscv/boot/dts/microchip/mpfs-tysom-m.dts |  35 +++-
arch/riscv/boot/dts/microchip/mpfs.dtsi       |  37 +++-
drivers/gpio/Kconfig                          |   1 +
drivers/gpio/gpio-mpfs.c                      | 122 +++++++++++-
drivers/soc/microchip/Kconfig                 |  11 ++
drivers/soc/microchip/Makefile                |   1 +
drivers/soc/microchip/mpfs-irqmux.c           | 181 ++++++++++++++++++
17 files changed, 673 insertions(+), 64 deletions(-)
create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-irqmux.yaml
create mode 100644 drivers/soc/microchip/mpfs-irqmux.c
[PATCH v13 0/5] PolarFire SoC GPIO interrupt support
Posted by Conor Dooley 2 weeks, 5 days ago
From: Conor Dooley <conor.dooley@microchip.com>

Yo,

Here's a v3 with an extra patch updating the gpio binding from fished
out from my old branch, fixing the examples and setting the permitted
values of gpios for the controllers on polarfire soc and the existing
binding patch's example fixed.

Bartosz, you acked the gpio driver patch, are you expecting the whole
lot to go together via the soc tree or something?

Cheers,
Conor.

v13:
- fix the binding example
- add a new binding patch

v12:
- Implemented mux driver feedback from Hervé.
- Reworked the gpio interrupt stuff per Linus' feedback, so didn't pick
  up Hervés tag.
- Modified the binding description to cover the 6 always "direct mode"
  interrupts on gpio controller 1.

CC: Thomas Gleixner <tglx@linutronix.de>
CC: Herve Codina <herve.codina@bootlin.com>
CC: Conor Dooley <conor.dooley@microchip.com>
CC: Daire McNamara <daire.mcnamara@microchip.com>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
CC: Paul Walmsley <pjw@kernel.org>
CC: Palmer Dabbelt <palmer@dabbelt.com>
CC: Albert Ou <aou@eecs.berkeley.edu>
CC: Alexandre Ghiti <alex@ghiti.fr>
CC: Linus Walleij <linusw@kernel.org>
CC: Bartosz Golaszewski <brgl@kernel.org>
CC: linux-riscv@lists.infradead.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-gpio@vger.kernel.org

Conor Dooley (5):
  dt-bindings: gpio: fix microchip,mpfs-gpio interrupt documentation
  gpio: mpfs: Add interrupt support
  dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt
    mux
  soc: microchip: add mpfs gpio interrupt mux driver
  riscv: dts: microchip: update mpfs gpio interrupts to better match the
    SoC

 .../bindings/gpio/microchip,mpfs-gpio.yaml    |  24 ++-
 .../soc/microchip/microchip,mpfs-irqmux.yaml  | 103 ++++++++++
 .../microchip,mpfs-mss-top-sysreg.yaml        |   4 +
 MAINTAINERS                                   |   2 +-
 .../boot/dts/microchip/mpfs-beaglev-fire.dts  |  29 +++
 .../boot/dts/microchip/mpfs-disco-kit.dts     |  43 +++--
 .../dts/microchip/mpfs-icicle-kit-common.dtsi |  37 +++-
 .../boot/dts/microchip/mpfs-m100pfsevp.dts    |  41 ++--
 .../boot/dts/microchip/mpfs-polarberry.dts    |  29 +++
 .../riscv/boot/dts/microchip/mpfs-sev-kit.dts |  37 +++-
 .../riscv/boot/dts/microchip/mpfs-tysom-m.dts |  35 +++-
 arch/riscv/boot/dts/microchip/mpfs.dtsi       |  37 +++-
 drivers/gpio/Kconfig                          |   1 +
 drivers/gpio/gpio-mpfs.c                      | 122 +++++++++++-
 drivers/soc/microchip/Kconfig                 |  11 ++
 drivers/soc/microchip/Makefile                |   1 +
 drivers/soc/microchip/mpfs-irqmux.c           | 181 ++++++++++++++++++
 17 files changed, 673 insertions(+), 64 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-irqmux.yaml
 create mode 100644 drivers/soc/microchip/mpfs-irqmux.c

-- 
2.51.0

Re: (subset) [PATCH v13 0/5] PolarFire SoC GPIO interrupt support
Posted by Conor Dooley 6 days, 3 hours ago
From: Conor Dooley <conor.dooley@microchip.com>

On Wed, 18 Mar 2026 11:04:31 +0000, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> Yo,
> 
> Here's a v3 with an extra patch updating the gpio binding from fished
> out from my old branch, fixing the examples and setting the permitted
> values of gpios for the controllers on polarfire soc and the existing
> binding patch's example fixed.
> 
> [...]

Gonna interpret the ack and lack of response to me asking if the gpio
change was mine to take as it being the case.
Applied to riscv-soc-for-next, thanks!

[2/5] gpio: mpfs: Add interrupt support
      https://git.kernel.org/conor/c/e57b53f0f36a
[3/5] dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux
      https://git.kernel.org/conor/c/5f3575cc73dc
[4/5] soc: microchip: add mpfs gpio interrupt mux driver
      https://git.kernel.org/conor/c/bd34cdd6d214

Thanks,
Conor.
Re: (subset) [PATCH v13 0/5] PolarFire SoC GPIO interrupt support
Posted by Bartosz Golaszewski 6 days, 3 hours ago
On Tue, Mar 31, 2026 at 3:15 PM Conor Dooley <conor@kernel.org> wrote:
>
> From: Conor Dooley <conor.dooley@microchip.com>
>
> On Wed, 18 Mar 2026 11:04:31 +0000, Conor Dooley wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > Yo,
> >
> > Here's a v3 with an extra patch updating the gpio binding from fished
> > out from my old branch, fixing the examples and setting the permitted
> > values of gpios for the controllers on polarfire soc and the existing
> > binding patch's example fixed.
> >
> > [...]
>
> Gonna interpret the ack and lack of response to me asking if the gpio
> change was mine to take as it being the case.
> Applied to riscv-soc-for-next, thanks!
>
> [2/5] gpio: mpfs: Add interrupt support
>       https://git.kernel.org/conor/c/e57b53f0f36a
> [3/5] dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux
>       https://git.kernel.org/conor/c/5f3575cc73dc
> [4/5] soc: microchip: add mpfs gpio interrupt mux driver
>       https://git.kernel.org/conor/c/bd34cdd6d214
>
> Thanks,
> Conor.

Ah, yes sorry, your email went under my radar. Feel free to take them.

Bart
Re: (subset) [PATCH v13 0/5] PolarFire SoC GPIO interrupt support
Posted by Bartosz Golaszewski 2 weeks ago
On Wed, 18 Mar 2026 11:04:31 +0000, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> Yo,
> 
> Here's a v3 with an extra patch updating the gpio binding from fished
> out from my old branch, fixing the examples and setting the permitted
> values of gpios for the controllers on polarfire soc and the existing
> binding patch's example fixed.
> 
> [...]

Applied, thanks!

[1/5] dt-bindings: gpio: fix microchip,mpfs-gpio interrupt documentation
      https://git.kernel.org/brgl/c/ececb46fc947705f22cc8c1f9182224e7ec4bb97

Best regards,
-- 
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Re: (subset) [PATCH v13 0/5] PolarFire SoC GPIO interrupt support
Posted by Conor Dooley 1 week, 5 days ago
On Mon, Mar 23, 2026 at 10:56:20AM +0100, Bartosz Golaszewski wrote:
> 
> On Wed, 18 Mar 2026 11:04:31 +0000, Conor Dooley wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> > 
> > Yo,
> > 
> > Here's a v3 with an extra patch updating the gpio binding from fished
> > out from my old branch, fixing the examples and setting the permitted
> > values of gpios for the controllers on polarfire soc and the existing
> > binding patch's example fixed.
> > 
> > [...]
> 
> Applied, thanks!
> 
> [1/5] dt-bindings: gpio: fix microchip,mpfs-gpio interrupt documentation
>       https://git.kernel.org/brgl/c/ececb46fc947705f22cc8c1f9182224e7ec4bb97

Am I to interpret this being all you applied and the driver getting an
ack as meaning I should take the driver change with the mux driver
through the soc tree?

Cheers,
Conor.