[PATCH 2/6] arm64: dts: qcom: milos: Fix GIC_ITS range length

Konrad Dybcio posted 6 patches 2 weeks, 6 days ago
[PATCH 2/6] arm64: dts: qcom: milos: Fix GIC_ITS range length
Posted by Konrad Dybcio 2 weeks, 6 days ago
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Currently, the GITS_SGIR register is cut off. Fix it up.

Fixes: d9d59d105f98 ("arm64: dts: qcom: Add initial Milos dtsi")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/milos.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
index e1a51d43943f..084be5316e0d 100644
--- a/arch/arm64/boot/dts/qcom/milos.dtsi
+++ b/arch/arm64/boot/dts/qcom/milos.dtsi
@@ -1911,7 +1911,7 @@ ppi_cluster1: interrupt-partition-1 {
 
 			gic_its: msi-controller@17140000 {
 				compatible = "arm,gic-v3-its";
-				reg = <0x0 0x17140000 0x0 0x20000>;
+				reg = <0x0 0x17140000 0x0 0x40000>;
 
 				msi-controller;
 				#msi-cells = <1>;

-- 
2.53.0
Re: [PATCH 2/6] arm64: dts: qcom: milos: Fix GIC_ITS range length
Posted by Luca Weiss 2 weeks, 6 days ago
On Tue Mar 17, 2026 at 3:41 PM CET, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> Currently, the GITS_SGIR register is cut off. Fix it up.
>
> Fixes: d9d59d105f98 ("arm64: dts: qcom: Add initial Milos dtsi")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/milos.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
> index e1a51d43943f..084be5316e0d 100644
> --- a/arch/arm64/boot/dts/qcom/milos.dtsi
> +++ b/arch/arm64/boot/dts/qcom/milos.dtsi
> @@ -1911,7 +1911,7 @@ ppi_cluster1: interrupt-partition-1 {
>  
>  			gic_its: msi-controller@17140000 {
>  				compatible = "arm,gic-v3-its";
> -				reg = <0x0 0x17140000 0x0 0x20000>;
> +				reg = <0x0 0x17140000 0x0 0x40000>;

The .FLAT doesn't make it super obvious what the size should be, but
yes, GITS0_SGIR would be outside the range with 0x20000, and 0x40000
looks sane given at 0x1718_0000 the next register after GITS0_SGIR is
located.

Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>


>  
>  				msi-controller;
>  				#msi-cells = <1>;