From: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
Add a clocksource driver for the P8700 GCRU.
Initialization uses helper functions
provided by clocksource/mmio.c and timer-of.c.
Since the GCRU does not support any kind of interrupts,
the default RISC-V clockevent implementation should suffice.
Signed-off-by: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
---
drivers/clocksource/Kconfig | 9 ++++++++
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-p8700.c | 45 +++++++++++++++++++++++++++++++++++++++
3 files changed, 55 insertions(+)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index ffcd23668763fe7707a4e917bf240caadbb09a8c..861e7b8c93376b345e3a488dabe435d06a42f357 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -672,6 +672,15 @@ config CLINT_TIMER
This option enables the CLINT timer for RISC-V systems. The CLINT
driver is usually used for NoMMU RISC-V systems.
+config P8700_TIMER
+ bool "MIPS P8700 timer driver"
+ depends on GENERIC_SCHED_CLOCK && RISCV && RISCV_SBI
+ select CLKSRC_MMIO
+ select TIMER_PROBE
+ select TIMER_OF
+ help
+ Enables support for MIPS P8700 timer driver.
+
config CSKY_MP_TIMER
bool "SMP Timer for the C-SKY platform" if COMPILE_TEST
depends on CSKY
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index ec4452ee958f1a814c708aeba6412bea61d24892..fae9a58d6c8663a7c857b9ab7fdae05782b3551c 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -95,3 +95,4 @@ obj-$(CONFIG_CLKSRC_LOONGSON1_PWM) += timer-loongson1-pwm.o
obj-$(CONFIG_EP93XX_TIMER) += timer-ep93xx.o
obj-$(CONFIG_RALINK_TIMER) += timer-ralink.o
obj-$(CONFIG_NXP_STM_TIMER) += timer-nxp-stm.o
+obj-$(CONFIG_P8700_TIMER) += timer-p8700.o
diff --git a/drivers/clocksource/timer-p8700.c b/drivers/clocksource/timer-p8700.c
new file mode 100644
index 0000000000000000000000000000000000000000..220ed8efdfe5544a3f925ad43b8faf2e0565557b
--- /dev/null
+++ b/drivers/clocksource/timer-p8700.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2025 MIPS.
+ */
+
+#include <linux/sched_clock.h>
+#include <linux/delay.h>
+#include <linux/of_address.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/clocksource.h>
+
+#include "timer-of.h"
+
+static struct timer_of gcru_of = { .flags = TIMER_OF_BASE };
+static u64 __iomem *p8700_time_val __ro_after_init;
+
+static u64 notrace p8700_timer_sched_read(void)
+{
+ return (u64)readq_relaxed(p8700_time_val);
+}
+
+static int __init p8700_timer_init(struct device_node *node)
+{
+ int error = 0;
+
+ error = timer_of_init(node, &gcru_of);
+ if (error)
+ return error;
+
+ p8700_time_val = timer_of_base(&gcru_of);
+ /* Now init the mmio timer with the address we got from DT */
+ error = clocksource_mmio_init(p8700_time_val, "mips,p8700-gcru",
+ riscv_timebase, 450, 64,
+ clocksource_mmio_readq_up);
+ if (error)
+ return error;
+
+ /* Sched clock */
+ sched_clock_register(p8700_timer_sched_read, 64, riscv_timebase);
+
+ return error;
+}
+
+TIMER_OF_DECLARE(p8700_timer, "mips,p8700-gcru", p8700_timer_init);
--
2.43.0