[PATCH 0/4] iio: adc: ad4691: add driver for AD4691 multichannel SAR ADC family

Radu Sabau via B4 Relay posted 4 patches 1 month ago
There is a newer version of this series
.../devicetree/bindings/iio/adc/adi,ad4691.yaml    |  278 +++
MAINTAINERS                                        |    9 +
drivers/iio/adc/Kconfig                            |   14 +
drivers/iio/adc/Makefile                           |    1 +
drivers/iio/adc/ad4691.c                           | 2031 ++++++++++++++++++++
include/dt-bindings/iio/adc/adi,ad4691.h           |   13 +
6 files changed, 2346 insertions(+)
[PATCH 0/4] iio: adc: ad4691: add driver for AD4691 multichannel SAR ADC family
Posted by Radu Sabau via B4 Relay 1 month ago
This series adds support for the Analog Devices AD4691 family of
high-speed, low-power multichannel successive approximation register
(SAR) ADCs with an SPI-compatible serial interface.

The family includes:
  - AD4691: 16-channel, 500 kSPS
  - AD4692: 16-channel, 1 MSPS
  - AD4693: 8-channel, 500 kSPS
  - AD4694: 8-channel, 1 MSPS

The devices support five operating modes:
  - CNV Clock Mode:    external PWM drives CNV, samples at PWM rate
  - CNV Burst Mode:    PWM triggers bursts, internal oscillator drives
                       conversions within each burst
  - Autonomous Mode:   internal oscillator drives conversions,
                       software starts/stops via register write
  - SPI Burst Mode:    similar to Autonomous Mode but optimised for
                       SPI burst reads
  - Manual Mode:       CNV tied to SPI CS; each SPI transfer triggers
                       a conversion and returns the previous result
                       (pipelined);

The series is structured as follows:

  1/4 - DT bindings (YAML schema + dt-bindings header) and
        MAINTAINERS entry
  2/4 - Initial driver: register map via custom regmap callbacks,
        IIO read_raw/write_raw, all five operating modes, direct
        single-channel reads
  3/4 - Triggered buffer support: IRQ-driven (DATA_READY / BUSY on
        GP0) for non-Manual modes; hrtimer-based trigger for Manual
        Mode to handle the pipelined SPI protocol
  4/4 - SPI Engine offload support: DMA-backed high-throughput
        capture path using the SPI offload subsystem

Datasheets:
  https://www.analog.com/en/products/ad4691.html
  https://www.analog.com/en/products/ad4692.html
  https://www.analog.com/en/products/ad4693.html
  https://www.analog.com/en/products/ad4694.html

Signed-off-by: Radu Sabau <radu.sabau@analog.com>
---
Radu Sabau (4):
      dt-bindings: iio: adc: add bindings for AD4691 family
      iio: adc: ad4691: add initial driver for AD4691 family
      iio: adc: ad4691: add triggered buffer support
      iio: adc: ad4691: add SPI offload support

 .../devicetree/bindings/iio/adc/adi,ad4691.yaml    |  278 +++
 MAINTAINERS                                        |    9 +
 drivers/iio/adc/Kconfig                            |   14 +
 drivers/iio/adc/Makefile                           |    1 +
 drivers/iio/adc/ad4691.c                           | 2031 ++++++++++++++++++++
 include/dt-bindings/iio/adc/adi,ad4691.h           |   13 +
 6 files changed, 2346 insertions(+)
---
base-commit: 11439c4635edd669ae435eec308f4ab8a0804808
change-id: 20260302-ad4692-multichannel-sar-adc-driver-78e4d44d24b2

Best regards,
-- 
Radu Sabau <radu.sabau@analog.com>
Re: [PATCH 0/4] iio: adc: ad4691: add driver for AD4691 multichannel SAR ADC family
Posted by Andy Shevchenko 1 month ago
On Thu, Mar 05, 2026 at 02:23:26PM +0200, Radu Sabau via B4 Relay wrote:
> This series adds support for the Analog Devices AD4691 family of
> high-speed, low-power multichannel successive approximation register
> (SAR) ADCs with an SPI-compatible serial interface.
> 
> The family includes:
>   - AD4691: 16-channel, 500 kSPS
>   - AD4692: 16-channel, 1 MSPS
>   - AD4693: 8-channel, 500 kSPS
>   - AD4694: 8-channel, 1 MSPS
> 
> The devices support five operating modes:
>   - CNV Clock Mode:    external PWM drives CNV, samples at PWM rate
>   - CNV Burst Mode:    PWM triggers bursts, internal oscillator drives
>                        conversions within each burst
>   - Autonomous Mode:   internal oscillator drives conversions,
>                        software starts/stops via register write
>   - SPI Burst Mode:    similar to Autonomous Mode but optimised for
>                        SPI burst reads
>   - Manual Mode:       CNV tied to SPI CS; each SPI transfer triggers
>                        a conversion and returns the previous result
>                        (pipelined);

This cover letter doesn't answer to the first important question: Why a brand
new driver? Do your homework and check what is already in the kernel and
explain in the next version why no other existing driver can be reused (refactored).

-- 
With Best Regards,
Andy Shevchenko