There's a conflict between the byte and byte_intf_div2 clocks trying to
set_rate on their common parent. The latter should follow the rate of
the former in one way or another anyway, so the fix here is to prevent
the latter from ratesetting the upstream PLL.

This series does just that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
Konrad Dybcio (5):
      clk: qcom: dispcc-glymur: Fix DSI byte clock rate setting
      clk: qcom: dispcc-kaanapali: Fix DSI byte clock rate setting
      clk: qcom: dispcc-milos: Fix DSI byte clock rate setting
      clk: qcom: dispcc-sm4450: Fix DSI byte clock rate setting
      clk: qcom: dispcc[01]-sa8775p: Fix DSI byte clock rate setting

 drivers/clk/qcom/dispcc-glymur.c    | 2 --
 drivers/clk/qcom/dispcc-kaanapali.c | 2 --
 drivers/clk/qcom/dispcc-milos.c     | 1 -
 drivers/clk/qcom/dispcc-sm4450.c    | 1 -
 drivers/clk/qcom/dispcc0-sa8775p.c  | 2 --
 drivers/clk/qcom/dispcc1-sa8775p.c  | 2 --
 6 files changed, 10 deletions(-)
---
base-commit: 3fa5e5702a82d259897bd7e209469bc06368bf31
change-id: 20260303-topic-dsi_byte_fixup-a6b4735e8d6e

Best regards,
-- 
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

On Wed, 04 Mar 2026 14:48:26 +0100, Konrad Dybcio wrote:
> There's a conflict between the byte and byte_intf_div2 clocks trying to
> set_rate on their common parent. The latter should follow the rate of
> the former in one way or another anyway, so the fix here is to prevent
> the latter from ratesetting the upstream PLL.
> 
> This series does just that.
> 
> [...]

Applied, thanks!

[1/5] clk: qcom: dispcc-glymur: Fix DSI byte clock rate setting
      commit: 98ea9eda030587601db56425efcd32263d853591
[2/5] clk: qcom: dispcc-kaanapali: Fix DSI byte clock rate setting
      commit: e892f4e3f3d558ce5d7595dca7cce2bd170a19fa
[3/5] clk: qcom: dispcc-milos: Fix DSI byte clock rate setting
      commit: dd5b76257b4048151006620c9895e2f5f0d997eb
[4/5] clk: qcom: dispcc-sm4450: Fix DSI byte clock rate setting
      commit: 7bc48fcdf9e77bf68ef04af015d50df2a9acac00
[5/5] clk: qcom: dispcc[01]-sa8775p: Fix DSI byte clock rate setting
      commit: 2851b6c6a42e22c243aa4cd606a49e2b9acfb6d6

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>