Documentation/devicetree/bindings/arm/qcom.yaml | 5 + arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sa8255p-ride.dts | 222 ++ arch/arm64/boot/dts/qcom/sa8255p.dtsi | 4861 +++++++++++++++++++++++ 4 files changed, 5089 insertions(+)
Introduce initial device tree support for sa8255p Qualcomm's automotive
infotainment SoC and its reference board: sa8255p-ride. Use SCMI power,
reset, performance, and sensor protocols to manage resources such as
clocks, regulators, interconnects, and PHYs. Operate the SCMI server
stack in an SMP-enabled VM, using the Qualcomm SMC/HVC transport driver
for communication.
Instantiate multiple SCMI instances to support parallelism and assign each
device a dedicated SCMI channel and Tx/Rx doorbells.
Group resource operations to improve abstraction and minimize SCMI
server requests. Apply the design as presented at LinaroConnect 2024
conference[1].
Features added and enabled:
- CPUs with cpufreq
- Interrupt-controller with PDC wakeup support
- Timers, TCSR
- Reserved memory regions
- TLMM
- QuP with uart
- SMMU
- Watchdog
- TSENS (Thermal Sensors)
- PMIC support
- IPCC
- Random number generator (RNG)
- UFS
- PCIE
Architecture:
+--------------------+
| Shared Memory |
| |
| +----------------+ | +-------------------+
+--------------------------------+ +-+-> | uart-shmem | <-+-+ | Linux |
| SCMI Platform | | | +----------------+ | | | +----------+ |
| | | | | | | | | UART | |
| +------------+ f +----------+ | | | | | | | Driver | |
| | Drivers <---+ SCMI | | e | | | | | | +--+----^--+ |
| | (clks, | g | Server +-+-------------------+ | | | | | | |
| | icc paths, +---> | | h | | | b|k | a| l| |
| | tlmm, | +--^-----+-+ | | | | | | | |
| | etc.) | | | | | | | | | +---v----+----+ |
| | | | | | | | +------------+--+ UART SCMI | |
| +------------+ | | | | | | | | INSTANCE | |
| | | | | | | +-^-----+-----+ |
| | | | | | | | | | |
+----------------------+-----+---+ | | +----+-----+--------+
| | | | | | |
| | +--------------------+ | |
d|IRQ i|HVC j|IRQ c|HVC
| | | |
| | | |
+-----------------------+-----v----------------------------------------------------------------------+-----v--------+
| |
| |
| |
| HYPERVISOR |
| |
| |
+-------------------------------------------------------------------------------------------------------------------+
+--------+ +--------+ +-----------+
| CLOCK | | TLMM | | UART |
+--------+ +--------+ +-----------+
---
Patch 1:
Changes in v5:
No changes
Changes in v4:
Added the patch in this series.
Rebased on linux-next
Link to v3 https://lore.kernel.org/all/20250423003845.3980330-1-quic_djaggi@quicinc.com/
Changes in v3:
Removed the patches from original series[2]
Changes in v2:
Added Reviewed-by tag
Patch 2:
Changes in v5:
Move soc and board dt into separate patches(Patch 2 and 3). - Dmitry
Drop arch timer label- Dmitry
Move pmic thermal zones to board dts - Dmitry
Changes in v4:
Added the patch in this series
Updates to commit text
Sorted clocks in alphabetical order
Added dcvsh interrupts
Hystersis value changed to 10000 for soc thermal zones
Deleted sa8255p-scmi.dtsi and scmi nodes moved under firmware node to sa8255p.dtsi
Changes to scmi shmem nodes - removed from sram and added to reserved region
Changes to copyright
Added address cells and size cells to interrupt controller/intc
Added dma-coherent property to smmu
Added pcie and ufs support
Link to v3 https://lore.kernel.org/all/20250422231249.871995-1-quic_djaggi@quicinc.com/
Changes in v3:
Removed the patches from original series [2].
Added arm,max-msg and arm,max-msg-size DT property in scmi nodes.
Changed max-rx-timeout-ms to arm,max-rx-timeout-ms in scmi nodes.
Updated commit text.
Reordered range property for qupv3_id_0, qupv3_id_1 and qupv3_id_3 nodes.
Reordered vendor property(#qcom,sensors) for tsens* nodes.
Changed cache labels to lower case.
Removed unused i2c,spi and tlmm nodes.
Updated reserved memory nodes.
Changes in v2:
Removed scmichannels label and alias
Modified scmi node name to conform to schema
Moved status property to be the last one in scmi instances
Changed to lower case for cpu labels
Added fallback compatible for tlmm node
Patch 3:
Changes in v5:
Added board changes into separate patch - Dmitry
PMIC thermal zones moved to board file - Dmitry
[1]: https://resources.linaro.org/en/resource/wfnfEwBhRjLV1PEAJoDDte
[2]: https://lore.kernel.org/all/20240903220240.2594102-1-quic_nkela@quicinc.com/
---
Nikunj Kela (3):
dt-bindings: arm: qcom: add SA8255p Ride board
arm64: dts: qcom: Introduce sa8255p SoC
arm64: dts: qcom: sa8255p: Enable sa8255p-ride board support
Documentation/devicetree/bindings/arm/qcom.yaml | 5 +
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/sa8255p-ride.dts | 222 ++
arch/arm64/boot/dts/qcom/sa8255p.dtsi | 4861 +++++++++++++++++++++++
4 files changed, 5089 insertions(+)
---
base-commit: af98e93c5c39e6d0b87b42f0a32dd3066f795718
change-id: 20260224-b4-scmi-upstream-c979c51694b1
Best regards,
--
Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
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