arch/arm64/boot/dts/qcom/sm8750.dtsi | 37 +++++++++++++++++++++++++++++++++++- 1 file changed, 36 insertions(+), 1 deletion(-)
The camera clock controller is split into cambistmclk and camcc. The
cambist clock controller handles the mclks and the rest of the clocks of
camera are part of the camcc clock controller.
Add the camcc clock controller device node for SM8750 SoC.
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
---
Changes in v2:
- Update the MxC phandle to use MX for camcc node.
- Add RB tag [Abel Vesa] and update the commit message.
- Link to v1: https://lore.kernel.org/r/20251203-sm8750_camcc_dt-v1-1-418e65e0e4e8@oss.qualcomm.com
---
arch/arm64/boot/dts/qcom/sm8750.dtsi | 37 +++++++++++++++++++++++++++++++++++-
1 file changed, 36 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index 3f0b57f428bbb388521c27d9ae96bbef3d62b2e2..740277b34427a07bc89ced99c80cd717466d6fc6 100644
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -2,7 +2,8 @@
/*
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
*/
-
+#include <dt-bindings/clock/qcom,sm8750-cambistmclkcc.h>
+#include <dt-bindings/clock/qcom,sm8750-camcc.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,sm8750-gcc.h>
#include <dt-bindings/clock/qcom,sm8750-tcsr.h>
@@ -2046,6 +2047,23 @@ aggre2_noc: interconnect@1700000 {
clocks = <&rpmhcc RPMH_IPA_CLK>;
};
+ cambistmclkcc: clock-controller@1760000 {
+ compatible = "qcom,sm8750-cambistmclkcc";
+ reg = <0x0 0x1760000 0x0 0x6000>;
+ clocks = <&gcc GCC_CAM_BIST_MCLK_AHB_CLK> ,
+ <&bi_tcxo_div2>,
+ <&bi_tcxo_ao_div2>,
+ <&sleep_clk>;
+ power-domains = <&rpmhpd RPMHPD_MMCX>,
+ <&rpmhpd RPMHPD_MX>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
+
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
mmss_noc: interconnect@1780000 {
compatible = "qcom,sm8750-mmss-noc";
reg = <0x0 0x01780000 0x0 0x5b800>;
@@ -2740,6 +2758,23 @@ usb_dwc3_ss: endpoint {
};
};
+ camcc: clock-controller@ade0000 {
+ compatible = "qcom,sm8750-camcc";
+ reg = <0x0 0xade0000 0x0 0x20000>;
+ clocks = <&gcc GCC_CAMERA_AHB_CLK>,
+ <&bi_tcxo_div2>,
+ <&bi_tcxo_ao_div2>,
+ <&sleep_clk>;
+ power-domains = <&rpmhpd RPMHPD_MMCX>,
+ <&rpmhpd RPMHPD_MX>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
+
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm8750-pdc", "qcom,pdc";
reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x164400f0 0x0 0x64>;
---
base-commit: 47b7b5e32bb7264b51b89186043e1ada4090b558
change-id: 20251203-sm8750_camcc_dt-350a8d217376
Best regards,
--
Taniya Das <taniya.das@oss.qualcomm.com>On 2/20/26 11:28 AM, Taniya Das wrote: > The camera clock controller is split into cambistmclk and camcc. The > cambist clock controller handles the mclks and the rest of the clocks of > camera are part of the camcc clock controller. > Add the camcc clock controller device node for SM8750 SoC. > > Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> > Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> > --- > Changes in v2: > - Update the MxC phandle to use MX for camcc node. My point was that both MXC and MXA are used (I see MXA particularly near CSI[24]PHY, but it may be a fluke, please take a look) Konrad
On 2/20/2026 4:25 PM, Konrad Dybcio wrote: > On 2/20/26 11:28 AM, Taniya Das wrote: >> The camera clock controller is split into cambistmclk and camcc. The >> cambist clock controller handles the mclks and the rest of the clocks of >> camera are part of the camcc clock controller. >> Add the camcc clock controller device node for SM8750 SoC. >> >> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> >> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> >> --- >> Changes in v2: >> - Update the MxC phandle to use MX for camcc node. > > My point was that both MXC and MXA are used > My bad, even I think I got confused with this. We really do not need MxA voting as it is always ON. We can sustain with MxC only. > (I see MXA particularly near CSI[24]PHY, but it may be a fluke, please > take a look) > > Konrad -- Thanks, Taniya Das
On 2/20/26 3:23 PM, Taniya Das wrote: > > > On 2/20/2026 4:25 PM, Konrad Dybcio wrote: >> On 2/20/26 11:28 AM, Taniya Das wrote: >>> The camera clock controller is split into cambistmclk and camcc. The >>> cambist clock controller handles the mclks and the rest of the clocks of >>> camera are part of the camcc clock controller. >>> Add the camcc clock controller device node for SM8750 SoC. >>> >>> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> >>> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> >>> --- >>> Changes in v2: >>> - Update the MxC phandle to use MX for camcc node. >> >> My point was that both MXC and MXA are used >> > > My bad, even I think I got confused with this. We really do not need MxA > voting as it is always ON. We can sustain with MxC only. Does that mean we don't even need any particular RPMH level on MxA for this usecase, just for it to be on (which as you said it always is)? Konrad
On 2/20/2026 7:55 PM, Konrad Dybcio wrote: > On 2/20/26 3:23 PM, Taniya Das wrote: >> >> >> On 2/20/2026 4:25 PM, Konrad Dybcio wrote: >>> On 2/20/26 11:28 AM, Taniya Das wrote: >>>> The camera clock controller is split into cambistmclk and camcc. The >>>> cambist clock controller handles the mclks and the rest of the clocks of >>>> camera are part of the camcc clock controller. >>>> Add the camcc clock controller device node for SM8750 SoC. >>>> >>>> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> >>>> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> >>>> --- >>>> Changes in v2: >>>> - Update the MxC phandle to use MX for camcc node. >>> >>> My point was that both MXC and MXA are used >>> >> >> My bad, even I think I got confused with this. We really do not need MxA >> voting as it is always ON. We can sustain with MxC only. > > Does that mean we don't even need any particular RPMH level on MxA > for this usecase, just for it to be on (which as you said it always is)? Particularly for this usecase you do not need. -- Thanks, Taniya Das
On 2/20/26 3:28 PM, Taniya Das wrote: > > > On 2/20/2026 7:55 PM, Konrad Dybcio wrote: >> On 2/20/26 3:23 PM, Taniya Das wrote: >>> >>> >>> On 2/20/2026 4:25 PM, Konrad Dybcio wrote: >>>> On 2/20/26 11:28 AM, Taniya Das wrote: >>>>> The camera clock controller is split into cambistmclk and camcc. The >>>>> cambist clock controller handles the mclks and the rest of the clocks of >>>>> camera are part of the camcc clock controller. >>>>> Add the camcc clock controller device node for SM8750 SoC. >>>>> >>>>> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> >>>>> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> >>>>> --- >>>>> Changes in v2: >>>>> - Update the MxC phandle to use MX for camcc node. >>>> >>>> My point was that both MXC and MXA are used >>>> >>> >>> My bad, even I think I got confused with this. We really do not need MxA >>> voting as it is always ON. We can sustain with MxC only. >> >> Does that mean we don't even need any particular RPMH level on MxA >> for this usecase, just for it to be on (which as you said it always is)? > > Particularly for this usecase you do not need. Thanks for tracking this down Konrad
© 2016 - 2026 Red Hat, Inc.