[PATCH v5 0/4] spi: cadence-qspi: Add Renesas RZ/N1 support

Miquel Raynal (Schneider Electric) posted 4 patches 3 days, 14 hours ago
.../devicetree/bindings/spi/cdns,qspi-nor.yaml     |  19 ++-
arch/arm/boot/dts/renesas/r9a06g032.dtsi           |  12 ++
drivers/spi/spi-cadence-quadspi.c                  | 168 +++++++++------------
3 files changed, 100 insertions(+), 99 deletions(-)
[PATCH v5 0/4] spi: cadence-qspi: Add Renesas RZ/N1 support
Posted by Miquel Raynal (Schneider Electric) 3 days, 14 hours ago
Hello,

This series adds support for the QSPI controller available on Renesas
RZ/N1S and RZ/N1D SoC. It has been tested with a custom board (see last
SPI patch for details), but has been tested by Wolfram (thank you!) on
the DB board.
Link: https://lore.kernel.org/linux-devicetree/20260116114852.52948-2-wsa+renesas@sang-engineering.com/

Adding support for this SoC required a few adaptations to the Cadence
QSPI driver which have already been merged (except one regarding clocks
handling). This series contains the remaining patches, the ones actually
adding support for the RZ/N1 flavour.

Thanks,
Miquèl

Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>
---
Changes in v5:
- Rebased on top of spi/for-next, fixed the binding conflict manually.
- Fixed the name of the SoC, as reported by Geert.
- Link to v4: https://lore.kernel.org/r/20260122-schneider-6-19-rc1-qspi-v4-0-f9c21419a3e6@bootlin.com

Changes in v4:
- Drop two binding patches judged useless.
- Collected Rob's acks.
- Fixed the RZ/N1D400 DTSI (removed the properties no longer relevant
  after my binding changes).
- Link to v3: https://lore.kernel.org/r/20260121-schneider-6-19-rc1-qspi-v3-0-43e70fab4444@bootlin.com

Changes in v3:
- Collected tags from Wolfram and Geert.
- Dropped the Cadence compatible as this fallback would simply not work
  alone.
- Fixed the clock issue reported by Santhosh.
- Fixed the DT snippet following the discussion with Geert.
- Modified more deeply the binding, to no longer expect a fifo
  size/depth nor any trigger address, as these values have no meaning in
  the score of the Renesas implementation.
- Link to v2: https://lore.kernel.org/r/20260115-schneider-6-19-rc1-qspi-v2-0-7e6a06e1e17b@bootlin.com

Changes in v2:
- Fix commit log of DT binding patch, following Krzysztof's comment.
- Fix properties order in DTSI.
- Rebase on top of spi/for-next and fix all conflicts.
- Simplify even further the code in the cleanup patches following
  Pratyush's advices.
- Link to v1: https://lore.kernel.org/r/20251219-schneider-6-19-rc1-qspi-v1-0-8ad505173e44@bootlin.com

---
Miquel Raynal (Schneider Electric) (4):
      spi: dt-bindings: cdns,qspi-nor: Add Renesas RZ/N1D400 to the list
      spi: cadence-qspi: Kill cqspi_jh7110_clk_init
      spi: cadence-qspi: Add support for the Renesas RZ/N1 controller
      ARM: dts: r9a06g032: Describe the QSPI controller

 .../devicetree/bindings/spi/cdns,qspi-nor.yaml     |  19 ++-
 arch/arm/boot/dts/renesas/r9a06g032.dtsi           |  12 ++
 drivers/spi/spi-cadence-quadspi.c                  | 168 +++++++++------------
 3 files changed, 100 insertions(+), 99 deletions(-)
---
base-commit: d248c6d8d9eadcbf60345dc9cd924dc6cc4d9b44
change-id: 20251219-schneider-6-19-rc1-qspi-7c3e1547af6d

Best regards,
-- 
Miquel Raynal <miquel.raynal@bootlin.com>

Re: (subset) [PATCH v5 0/4] spi: cadence-qspi: Add Renesas RZ/N1 support
Posted by Mark Brown 3 days, 8 hours ago
On Thu, 05 Feb 2026 19:09:47 +0100, Miquel Raynal (Schneider Electric) wrote:
> This series adds support for the QSPI controller available on Renesas
> RZ/N1S and RZ/N1D SoC. It has been tested with a custom board (see last
> SPI patch for details), but has been tested by Wolfram (thank you!) on
> the DB board.
> Link: https://lore.kernel.org/linux-devicetree/20260116114852.52948-2-wsa+renesas@sang-engineering.com/
> 
> Adding support for this SoC required a few adaptations to the Cadence
> QSPI driver which have already been merged (except one regarding clocks
> handling). This series contains the remaining patches, the ones actually
> adding support for the RZ/N1 flavour.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/4] spi: dt-bindings: cdns,qspi-nor: Add Renesas RZ/N1D400 to the list
      commit: 2b97f5cd1a956a9ac948ec57775600158988dadd
[2/4] spi: cadence-qspi: Kill cqspi_jh7110_clk_init
      commit: 324ecc7788c2e21d0d9197a8c015ff75382122d9
[3/4] spi: cadence-qspi: Add support for the Renesas RZ/N1 controller
      commit: a40236feb62ccbf2b36d288550a483122b3205e5

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark