Embedded Trace Router(ETR) is working as a DDR memory sink to collect
tracing data from source device.
The CTCU serves as the control unit for the ETR device, managing its
behavior to determine how trace data is collected.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/hamoa.dtsi | 160 +++++++++++++++++++++++++++++++++++-
1 file changed, 159 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index db65c392e618..88ec29446ba1 100644
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -6771,6 +6771,35 @@ data-pins {
};
};
+ ctcu@10001000 {
+ compatible = "qcom,hamoa-ctcu", "qcom,sa8775p-ctcu";
+ reg = <0x0 0x10001000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ ctcu_in0: endpoint {
+ remote-endpoint = <&etr0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ ctcu_in1: endpoint {
+ remote-endpoint = <&etr1_out>;
+ };
+ };
+ };
+ };
+
stm@10002000 {
compatible = "arm,coresight-stm", "arm,primecell";
reg = <0x0 0x10002000 0x0 0x1000>,
@@ -6985,6 +7014,122 @@ qdss_funnel_out: endpoint {
};
};
+ replicator@10046000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x10046000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ qdss_rep_in: endpoint {
+ remote-endpoint = <&swao_rep_out0>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ qdss_rep_out0: endpoint {
+ remote-endpoint = <&etr_rep_in>;
+ };
+ };
+ };
+ };
+
+ tmc_etr: tmc@10048000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x0 0x10048000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ iommus = <&apps_smmu 0x04e0 0x0>;
+
+ arm,scatter-gather;
+
+ in-ports {
+ port {
+ etr0_in: endpoint {
+ remote-endpoint = <&etr_rep_out0>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ etr0_out: endpoint {
+ remote-endpoint = <&ctcu_in0>;
+ };
+ };
+ };
+ };
+
+ replicator@1004e000 {
+ compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+ reg = <0x0 0x1004e000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ etr_rep_in: endpoint {
+ remote-endpoint = <&qdss_rep_out0>;
+ };
+ };
+ };
+
+ out-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ etr_rep_out0: endpoint {
+ remote-endpoint = <&etr0_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ etr_rep_out1: endpoint {
+ remote-endpoint = <&etr1_in>;
+ };
+ };
+ };
+ };
+
+ tmc_etr1: tmc@1004f000 {
+ compatible = "arm,coresight-tmc", "arm,primecell";
+ reg = <0x0 0x1004f000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+ iommus = <&apps_smmu 0x0500 0x0>;
+
+ arm,scatter-gather;
+ arm,buffer-size = <0x400000>;
+
+ in-ports {
+ port {
+ etr1_in: endpoint {
+ remote-endpoint = <&etr_rep_out1>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ etr1_out: endpoint {
+ remote-endpoint = <&ctcu_in1>;
+ };
+ };
+ };
+ };
+
tpdm@10800000 {
compatible = "qcom,coresight-tpdm", "arm,primecell";
reg = <0x0 0x10800000 0x0 0x1000>;
@@ -7298,7 +7443,20 @@ swao_rep_in: endpoint {
};
out-ports {
- port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ swao_rep_out0: endpoint {
+ remote-endpoint = <&qdss_rep_in>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
swao_rep_out1: endpoint {
remote-endpoint = <&eud_in>;
};
--
2.34.1On 2/3/26 10:32 AM, Jie Gan wrote:
> Embedded Trace Router(ETR) is working as a DDR memory sink to collect
> tracing data from source device.
>
> The CTCU serves as the control unit for the ETR device, managing its
> behavior to determine how trace data is collected.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/hamoa.dtsi | 160 +++++++++++++++++++++++++++++++++++-
> 1 file changed, 159 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
> index db65c392e618..88ec29446ba1 100644
> --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
> +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
> @@ -6771,6 +6771,35 @@ data-pins {
> };
> };
>
> + ctcu@10001000 {
> + compatible = "qcom,hamoa-ctcu", "qcom,sa8775p-ctcu";
Sorry for not pointing that out explicitly the previous time around,
but 'hamoa' also falls under the "had numerical compatibles" category
(you'll see the only hits for "qcom,hamoa" are "qcom,hamoa-iot-evk"
which is a board name)
Glymur and Kaanapali are, understandably, Glymur and Kaanapali
respectively
Konrad
On 2/3/2026 5:44 PM, Konrad Dybcio wrote:
> On 2/3/26 10:32 AM, Jie Gan wrote:
>> Embedded Trace Router(ETR) is working as a DDR memory sink to collect
>> tracing data from source device.
>>
>> The CTCU serves as the control unit for the ETR device, managing its
>> behavior to determine how trace data is collected.
>>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/hamoa.dtsi | 160 +++++++++++++++++++++++++++++++++++-
>> 1 file changed, 159 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
>> index db65c392e618..88ec29446ba1 100644
>> --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
>> @@ -6771,6 +6771,35 @@ data-pins {
>> };
>> };
>>
>> + ctcu@10001000 {
>> + compatible = "qcom,hamoa-ctcu", "qcom,sa8775p-ctcu";
>
> Sorry for not pointing that out explicitly the previous time around,
> but 'hamoa' also falls under the "had numerical compatibles" category
I saw the dtsi is renamed to hamoa.dtsi but we still need to use
qcom,x1e80100 for hamoa?
Thanks,
Jie
> (you'll see the only hits for "qcom,hamoa" are "qcom,hamoa-iot-evk"
> which is a board name)
>
> Glymur and Kaanapali are, understandably, Glymur and Kaanapali
> respectively
>
> Konrad
On 2/3/26 10:50 AM, Jie Gan wrote:
>
>
> On 2/3/2026 5:44 PM, Konrad Dybcio wrote:
>> On 2/3/26 10:32 AM, Jie Gan wrote:
>>> Embedded Trace Router(ETR) is working as a DDR memory sink to collect
>>> tracing data from source device.
>>>
>>> The CTCU serves as the control unit for the ETR device, managing its
>>> behavior to determine how trace data is collected.
>>>
>>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>>> ---
>>> arch/arm64/boot/dts/qcom/hamoa.dtsi | 160 +++++++++++++++++++++++++++++++++++-
>>> 1 file changed, 159 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
>>> index db65c392e618..88ec29446ba1 100644
>>> --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
>>> @@ -6771,6 +6771,35 @@ data-pins {
>>> };
>>> };
>>> + ctcu@10001000 {
>>> + compatible = "qcom,hamoa-ctcu", "qcom,sa8775p-ctcu";
>>
>> Sorry for not pointing that out explicitly the previous time around,
>> but 'hamoa' also falls under the "had numerical compatibles" category
>
> I saw the dtsi is renamed to hamoa.dtsi but we still need to use qcom,x1e80100 for hamoa?
Preferably, yes, so that all compatibles for a given SoC are
""namespaced"" consistently
Konrad
On 2/3/2026 5:50 PM, Jie Gan wrote:
>
>
> On 2/3/2026 5:44 PM, Konrad Dybcio wrote:
>> On 2/3/26 10:32 AM, Jie Gan wrote:
>>> Embedded Trace Router(ETR) is working as a DDR memory sink to collect
>>> tracing data from source device.
>>>
>>> The CTCU serves as the control unit for the ETR device, managing its
>>> behavior to determine how trace data is collected.
>>>
>>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
>>> ---
>>> arch/arm64/boot/dts/qcom/hamoa.dtsi | 160 +++++++++++++++++++++++++
>>> ++++++++++-
>>> 1 file changed, 159 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/
>>> dts/qcom/hamoa.dtsi
>>> index db65c392e618..88ec29446ba1 100644
>>> --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
>>> @@ -6771,6 +6771,35 @@ data-pins {
>>> };
>>> };
>>> + ctcu@10001000 {
>>> + compatible = "qcom,hamoa-ctcu", "qcom,sa8775p-ctcu";
>>
>> Sorry for not pointing that out explicitly the previous time around,
>> but 'hamoa' also falls under the "had numerical compatibles" category
>
> I saw the dtsi is renamed to hamoa.dtsi but we still need to use
> qcom,x1e80100 for hamoa?
>
I think I was misunderstanding here.
Just checked the compatible for hamoa:
compatible = "qcom,hamoa-iot-evk", "qcom,hamoa-iot-som", "qcom,x1e80100";
I will change it to qcom,x1e80100-ctcu.
Thanks,
Jie
> Thanks,
> Jie
>
>> (you'll see the only hits for "qcom,hamoa" are "qcom,hamoa-iot-evk"
>> which is a board name)
>>
>> Glymur and Kaanapali are, understandably, Glymur and Kaanapali
>> respectively
>>
>> Konrad
>
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