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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a88b3eedd0sm162489155ad.3.2026.02.03.01.33.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Feb 2026 01:33:21 -0800 (PST) From: Jie Gan Date: Tue, 03 Feb 2026 17:32:50 +0800 Subject: [PATCH v2 2/3] arm64: dts: qcom: hamoa: enable ETR and CTCU devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260203-enable-ctcu-and-etr-v2-2-aacc7bd7eccb@oss.qualcomm.com> References: <20260203-enable-ctcu-and-etr-v2-0-aacc7bd7eccb@oss.qualcomm.com> In-Reply-To: <20260203-enable-ctcu-and-etr-v2-0-aacc7bd7eccb@oss.qualcomm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Tingwei Zhang , Bjorn Andersson , Konrad Dybcio Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jie Gan , Konrad Dybcio X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1770111187; l=4204; i=jie.gan@oss.qualcomm.com; s=20250909; h=from:subject:message-id; bh=MmRh2JiBpDaFVC7myctfzKWNEp/EVU+H7DSEDhr01cc=; b=nKhz/tZ73YjN+u7I6TzVKYsxiiUB7OTGb1oZiZI1TdDqN6lZnR+Hy2NaZ8iuf9mgnithxKk6y VdJ0eikjG9dBxKsiBdhOhKqmftgHNpi519RY1sAEGbRi6jqyuhYDRdc X-Developer-Key: i=jie.gan@oss.qualcomm.com; a=ed25519; pk=3LxxUZRPCNkvPDlWOvXfJNqNO4SfGdy3eghMb8puHuk= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjAzMDA3NCBTYWx0ZWRfX6u2JCGPb41NL rmfJxna8R+3JpWlwErIKxX0Vfij7QMg+rgD1KkQabaYVpuehqzC6oDBERZ9m0ovr19OkxeS8Ci5 1quf3dWJoF7L3qqPiHmqONxNaOlKsQLwQBwW/d4/E7PPD+jEYOHPHpqgYWnK7TUpuldWfWvJWPE eBSTscMLgpy2jOT+pLMFNHrGCDIqMqDiPs4G+obkGsApOSaLGzESVVgfk4+T04bUq9H9uX9/CFh bkgESaB1eKmfnx61uNA7MreVhtB6u5LBiwBKVBgn8FFzXbXuVyn1CLPAeytLAzVKwTJ2h2qITfo nD38hH0CT3yRqkgFiYSTbwUH2KFlE0dPblUwpbV49+XRyMi196sdDnGMmUX+peeM8nDKd3ifMOU bCXhQ7jIW25uo15hIdQjW/fEaUPCKrPFyCmSBsPPS8xycVVJD2EqHs0k7NKUR9X+2nxibKoLl49 qfPNk3wnJmKsJc0TYsg== X-Proofpoint-ORIG-GUID: 8JGWATx7-UGnoorTDMhT2aGl2nnU_Gm9 X-Proofpoint-GUID: 8JGWATx7-UGnoorTDMhT2aGl2nnU_Gm9 X-Authority-Analysis: v=2.4 cv=UKTQ3Sfy c=1 sm=1 tr=0 ts=6981c0e2 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=kFQAvpsttJVeTngcj60A:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-03_03,2026-02-02_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 malwarescore=0 adultscore=0 priorityscore=1501 phishscore=0 clxscore=1015 bulkscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602030074 Embedded Trace Router(ETR) is working as a DDR memory sink to collect tracing data from source device. The CTCU serves as the control unit for the ETR device, managing its behavior to determine how trace data is collected. Reviewed-by: Konrad Dybcio Signed-off-by: Jie Gan --- arch/arm64/boot/dts/qcom/hamoa.dtsi | 160 ++++++++++++++++++++++++++++++++= +++- 1 file changed, 159 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom= /hamoa.dtsi index db65c392e618..88ec29446ba1 100644 --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi @@ -6771,6 +6771,35 @@ data-pins { }; }; =20 + ctcu@10001000 { + compatible =3D "qcom,hamoa-ctcu", "qcom,sa8775p-ctcu"; + reg =3D <0x0 0x10001000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb"; + + in-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + ctcu_in0: endpoint { + remote-endpoint =3D <&etr0_out>; + }; + }; + + port@1 { + reg =3D <1>; + + ctcu_in1: endpoint { + remote-endpoint =3D <&etr1_out>; + }; + }; + }; + }; + stm@10002000 { compatible =3D "arm,coresight-stm", "arm,primecell"; reg =3D <0x0 0x10002000 0x0 0x1000>, @@ -6985,6 +7014,122 @@ qdss_funnel_out: endpoint { }; }; =20 + replicator@10046000 { + compatible =3D "arm,coresight-dynamic-replicator", "arm,primecell"; + reg =3D <0x0 0x10046000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + port { + qdss_rep_in: endpoint { + remote-endpoint =3D <&swao_rep_out0>; + }; + }; + }; + + out-ports { + port { + qdss_rep_out0: endpoint { + remote-endpoint =3D <&etr_rep_in>; + }; + }; + }; + }; + + tmc_etr: tmc@10048000 { + compatible =3D "arm,coresight-tmc", "arm,primecell"; + reg =3D <0x0 0x10048000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + iommus =3D <&apps_smmu 0x04e0 0x0>; + + arm,scatter-gather; + + in-ports { + port { + etr0_in: endpoint { + remote-endpoint =3D <&etr_rep_out0>; + }; + }; + }; + + out-ports { + port { + etr0_out: endpoint { + remote-endpoint =3D <&ctcu_in0>; + }; + }; + }; + }; + + replicator@1004e000 { + compatible =3D "arm,coresight-dynamic-replicator", "arm,primecell"; + reg =3D <0x0 0x1004e000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + + in-ports { + port { + etr_rep_in: endpoint { + remote-endpoint =3D <&qdss_rep_out0>; + }; + }; + }; + + out-ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + etr_rep_out0: endpoint { + remote-endpoint =3D <&etr0_in>; + }; + }; + + port@1 { + reg =3D <1>; + + etr_rep_out1: endpoint { + remote-endpoint =3D <&etr1_in>; + }; + }; + }; + }; + + tmc_etr1: tmc@1004f000 { + compatible =3D "arm,coresight-tmc", "arm,primecell"; + reg =3D <0x0 0x1004f000 0x0 0x1000>; + + clocks =3D <&aoss_qmp>; + clock-names =3D "apb_pclk"; + iommus =3D <&apps_smmu 0x0500 0x0>; + + arm,scatter-gather; + arm,buffer-size =3D <0x400000>; + + in-ports { + port { + etr1_in: endpoint { + remote-endpoint =3D <&etr_rep_out1>; + }; + }; + }; + + out-ports { + port { + etr1_out: endpoint { + remote-endpoint =3D <&ctcu_in1>; + }; + }; + }; + }; + tpdm@10800000 { compatible =3D "qcom,coresight-tpdm", "arm,primecell"; reg =3D <0x0 0x10800000 0x0 0x1000>; @@ -7298,7 +7443,20 @@ swao_rep_in: endpoint { }; =20 out-ports { - port { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + swao_rep_out0: endpoint { + remote-endpoint =3D <&qdss_rep_in>; + }; + }; + + port@1 { + reg =3D <1>; + swao_rep_out1: endpoint { remote-endpoint =3D <&eud_in>; }; --=20 2.34.1