[patch 0/4] sched/mmcid: Cure mode transition woes

Thomas Gleixner posted 4 patches 1 week, 1 day ago
There is a newer version of this series
include/linux/rseq_types.h |    7 -
kernel/sched/core.c        |  170 +++++++++++++++++++++++++++++----------------
kernel/sched/sched.h       |   45 +++++++++--
3 files changed, 151 insertions(+), 71 deletions(-)
[patch 0/4] sched/mmcid: Cure mode transition woes
Posted by Thomas Gleixner 1 week, 1 day ago
Ihor and Shrikanth reported hard lockups which can be tracked back to the recent
rewrite of the MM_CID management code.

  1) The from task to CPU ownership transition lacks the intermediate
     transition mode, which can lead to CID pool exhaustion and a
     subsequent live lock. That intermediate mode was implemented for the
     reverse operation already but omitted for this transition as the
     original analysis missed a few possible scheduling scenarios.

  2) Weakly ordered architectures can observe inconsistent state which
     causes them to make the wrong decision. That leads to the same problem
     as with #1.

The following series addresses these issue and fixes another albeit harmless
inconsistent state hickup which was found when analysing the above issues.

With these issues addressed the last change optimizes the bitmap
utilization in the transition modes.

The series applies on Linus tree and passes the selftests and a thread pool
emulator which stress tests the ownership transitions.

Thanks,

	tglx
---
 include/linux/rseq_types.h |    7 -
 kernel/sched/core.c        |  170 +++++++++++++++++++++++++++++----------------
 kernel/sched/sched.h       |   45 +++++++++--
 3 files changed, 151 insertions(+), 71 deletions(-)
Re: [patch 0/4] sched/mmcid: Cure mode transition woes
Posted by Ihor Solodrai 1 week, 1 day ago
On 1/29/26 1:20 PM, Thomas Gleixner wrote:
> Ihor and Shrikanth reported hard lockups which can be tracked back to the recent
> rewrite of the MM_CID management code.
> 
>   1) The from task to CPU ownership transition lacks the intermediate
>      transition mode, which can lead to CID pool exhaustion and a
>      subsequent live lock. That intermediate mode was implemented for the
>      reverse operation already but omitted for this transition as the
>      original analysis missed a few possible scheduling scenarios.
> 
>   2) Weakly ordered architectures can observe inconsistent state which
>      causes them to make the wrong decision. That leads to the same problem
>      as with #1.
> 
> The following series addresses these issue and fixes another albeit harmless
> inconsistent state hickup which was found when analysing the above issues.

Thomas, thank you for addressing this so quickly.

I applied the series as temporary BPF CI specific patches.
I'll report if I notice any relevant issues.

> 
> With these issues addressed the last change optimizes the bitmap
> utilization in the transition modes.
> 
> The series applies on Linus tree and passes the selftests and a thread pool
> emulator which stress tests the ownership transitions.
> 
> Thanks,
> 
> 	tglx
> ---
>  include/linux/rseq_types.h |    7 -
>  kernel/sched/core.c        |  170 +++++++++++++++++++++++++++++----------------
>  kernel/sched/sched.h       |   45 +++++++++--
>  3 files changed, 151 insertions(+), 71 deletions(-)