If clk_register_composite() fails, call kfree() to release
div and gate.
Fixes: b9b8e614b580 ("clk: st: Support for PLLs inside ClockGenA(s)")
Cc: stable@vger.kernel.org
Signed-off-by: Haoxiang Li <lihaoxiang@isrc.iscas.ac.cn>
Reviewed-by: Brian Masney <bmasney@redhat.com>
---
drivers/clk/st/clkgen-pll.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c
index c258ff87a171..a7d605b52cf3 100644
--- a/drivers/clk/st/clkgen-pll.c
+++ b/drivers/clk/st/clkgen-pll.c
@@ -742,8 +742,11 @@ static struct clk * __init clkgen_odf_register(const char *parent_name,
&div->hw, &clk_divider_ops,
&gate->hw, &clk_gate_ops,
flags);
- if (IS_ERR(clk))
+ if (IS_ERR(clk)) {
+ kfree(div);
+ kfree(gate);
return clk;
+ }
pr_debug("%s: parent %s rate %lu\n",
__clk_get_name(clk),
--
2.25.1