dpu_plane_atomic_check_nosspp() currently handles both plane
validation and plane splitting. For better simplicity and to
facilitate future refactoring, move the splitting logic into
its own dedicated function.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 51 ++++++++++++++++++++++---------
1 file changed, 36 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index 9b7a8b46bfa91..66f240ce29d07 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -821,13 +821,8 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
{
int i, ret = 0, min_scale, max_scale;
struct dpu_plane *pdpu = to_dpu_plane(plane);
- struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
- u64 max_mdp_clk_rate = kms->perf.max_core_clk_rate;
struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
- struct dpu_sw_pipe_cfg *pipe_cfg;
- struct dpu_sw_pipe_cfg *r_pipe_cfg;
struct drm_rect fb_rect = { 0 };
- uint32_t max_linewidth;
min_scale = FRAC_16_16(1, MAX_UPSCALE_RATIO);
max_scale = MAX_DOWNSCALE_RATIO << 16;
@@ -850,14 +845,6 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
return -EINVAL;
}
- /* move the assignment here, to ease handling to another pairs later */
- pipe_cfg = &pstate->pipe_cfg[0];
- r_pipe_cfg = &pstate->pipe_cfg[1];
- /* state->src is 16.16, src_rect is not */
- drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src);
-
- pipe_cfg->dst_rect = new_plane_state->dst;
-
fb_rect.x2 = new_plane_state->fb->width;
fb_rect.y2 = new_plane_state->fb->height;
@@ -879,6 +866,34 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
if (pstate->layout.plane_pitch[i] > DPU_SSPP_MAX_PITCH_SIZE)
return -E2BIG;
+ pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);
+
+ return 0;
+}
+
+static int dpu_plane_split(struct drm_plane *plane,
+ struct drm_plane_state *new_plane_state,
+ const struct drm_crtc_state *crtc_state)
+{
+ struct dpu_plane *pdpu = to_dpu_plane(plane);
+ struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
+ u64 max_mdp_clk_rate = kms->perf.max_core_clk_rate;
+ struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
+ struct dpu_sw_pipe_cfg *pipe_cfg;
+ struct dpu_sw_pipe_cfg *r_pipe_cfg;
+ uint32_t max_linewidth;
+
+ if (!new_plane_state->visible)
+ return 0;
+
+ /* move the assignment here, to ease handling to another pairs later */
+ pipe_cfg = &pstate->pipe_cfg[0];
+ r_pipe_cfg = &pstate->pipe_cfg[1];
+ /* state->src is 16.16, src_rect is not */
+ drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src);
+
+ pipe_cfg->dst_rect = new_plane_state->dst;
+
max_linewidth = pdpu->catalog->caps->max_linewidth;
drm_rect_rotate(&pipe_cfg->src_rect,
@@ -910,8 +925,6 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
new_plane_state->fb->width, new_plane_state->fb->height,
new_plane_state->rotation);
- pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);
-
return 0;
}
@@ -1129,6 +1142,10 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,
if (ret)
return ret;
+ ret = dpu_plane_split(plane, new_plane_state, crtc_state);
+ if (ret)
+ return ret;
+
if (!new_plane_state->visible)
return 0;
@@ -1169,6 +1186,10 @@ static int dpu_plane_virtual_atomic_check(struct drm_plane *plane,
if (ret)
return ret;
+ ret = dpu_plane_split(plane, plane_state, crtc_state);
+ if (ret)
+ return ret;
+
if (!plane_state->visible) {
/*
* resources are freed by dpu_crtc_assign_plane_resources(),
--
2.43.0On Wed, Jan 21, 2026 at 04:01:50PM +0800, Jun Nie wrote:
> dpu_plane_atomic_check_nosspp() currently handles both plane
> validation and plane splitting. For better simplicity and to
> facilitate future refactoring, move the splitting logic into
> its own dedicated function.
>
> Signed-off-by: Jun Nie <jun.nie@linaro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 51 ++++++++++++++++++++++---------
> 1 file changed, 36 insertions(+), 15 deletions(-)
>
> @@ -879,6 +866,34 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
> if (pstate->layout.plane_pitch[i] > DPU_SSPP_MAX_PITCH_SIZE)
> return -E2BIG;
>
> + pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);
> +
> + return 0;
> +}
> +
> +static int dpu_plane_split(struct drm_plane *plane,
> + struct drm_plane_state *new_plane_state,
> + const struct drm_crtc_state *crtc_state)
> +{
> + struct dpu_plane *pdpu = to_dpu_plane(plane);
> + struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
> + u64 max_mdp_clk_rate = kms->perf.max_core_clk_rate;
> + struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
> + struct dpu_sw_pipe_cfg *pipe_cfg;
> + struct dpu_sw_pipe_cfg *r_pipe_cfg;
> + uint32_t max_linewidth;
> +
> + if (!new_plane_state->visible)
> + return 0;
> +
> + /* move the assignment here, to ease handling to another pairs later */
> + pipe_cfg = &pstate->pipe_cfg[0];
> + r_pipe_cfg = &pstate->pipe_cfg[1];
> + /* state->src is 16.16, src_rect is not */
> + drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src);
> +
> + pipe_cfg->dst_rect = new_plane_state->dst;
> +
> max_linewidth = pdpu->catalog->caps->max_linewidth;
>
> drm_rect_rotate(&pipe_cfg->src_rect,
> @@ -910,8 +925,6 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
> new_plane_state->fb->width, new_plane_state->fb->height,
> new_plane_state->rotation);
>
> - pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);
> -
> return 0;
> }
>
> @@ -1129,6 +1142,10 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,
> if (ret)
> return ret;
>
> + ret = dpu_plane_split(plane, new_plane_state, crtc_state);
> + if (ret)
> + return ret;
> +
> if (!new_plane_state->visible)
> return 0;
>
> @@ -1169,6 +1186,10 @@ static int dpu_plane_virtual_atomic_check(struct drm_plane *plane,
> if (ret)
> return ret;
>
> + ret = dpu_plane_split(plane, plane_state, crtc_state);
> + if (ret)
> + return ret;
Why can't it be moved after !visible check? It's the first check in the
function code.
> +
> if (!plane_state->visible) {
> /*
> * resources are freed by dpu_crtc_assign_plane_resources(),
>
> --
> 2.43.0
>
--
With best wishes
Dmitry
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> 于2026年1月21日周三 17:29写道：
>
> On Wed, Jan 21, 2026 at 04:01:50PM +0800, Jun Nie wrote:
> > dpu_plane_atomic_check_nosspp() currently handles both plane
> > validation and plane splitting. For better simplicity and to
> > facilitate future refactoring, move the splitting logic into
> > its own dedicated function.
> >
> > Signed-off-by: Jun Nie <jun.nie@linaro.org>
> > ---
> > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 51 ++++++++++++++++++++++---------
> > 1 file changed, 36 insertions(+), 15 deletions(-)
> >
> > @@ -879,6 +866,34 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
> > if (pstate->layout.plane_pitch[i] > DPU_SSPP_MAX_PITCH_SIZE)
> > return -E2BIG;
> >
> > + pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);
> > +
> > + return 0;
> > +}
> > +
> > +static int dpu_plane_split(struct drm_plane *plane,
> > + struct drm_plane_state *new_plane_state,
> > + const struct drm_crtc_state *crtc_state)
> > +{
> > + struct dpu_plane *pdpu = to_dpu_plane(plane);
> > + struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
> > + u64 max_mdp_clk_rate = kms->perf.max_core_clk_rate;
> > + struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
> > + struct dpu_sw_pipe_cfg *pipe_cfg;
> > + struct dpu_sw_pipe_cfg *r_pipe_cfg;
> > + uint32_t max_linewidth;
> > +
> > + if (!new_plane_state->visible)
> > + return 0;
> > +
> > + /* move the assignment here, to ease handling to another pairs later */
> > + pipe_cfg = &pstate->pipe_cfg[0];
> > + r_pipe_cfg = &pstate->pipe_cfg[1];
> > + /* state->src is 16.16, src_rect is not */
> > + drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src);
> > +
> > + pipe_cfg->dst_rect = new_plane_state->dst;
> > +
> > max_linewidth = pdpu->catalog->caps->max_linewidth;
> >
> > drm_rect_rotate(&pipe_cfg->src_rect,
> > @@ -910,8 +925,6 @@ static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane,
> > new_plane_state->fb->width, new_plane_state->fb->height,
> > new_plane_state->rotation);
> >
> > - pstate->needs_qos_remap = drm_atomic_crtc_needs_modeset(crtc_state);
> > -
> > return 0;
> > }
> >
> > @@ -1129,6 +1142,10 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,
> > if (ret)
> > return ret;
> >
> > + ret = dpu_plane_split(plane, new_plane_state, crtc_state);
> > + if (ret)
> > + return ret;
> > +
> > if (!new_plane_state->visible)
> > return 0;
> >
> > @@ -1169,6 +1186,10 @@ static int dpu_plane_virtual_atomic_check(struct drm_plane *plane,
> > if (ret)
> > return ret;
> >
> > + ret = dpu_plane_split(plane, plane_state, crtc_state);
> > + if (ret)
> > + return ret;
>
> Why can't it be moved after !visible check? It's the first check in the
> function code.
Surely it can be moved after !visible check and it is a better place. Placing
it just after dpu_plane_atomic_check_nosspp() is because
it is splitted from it. And it does not matter actually, because
dpu_plane_split() is moved to the deferred part
dpu_plane_virtual_assign_resources()
in the later patch. So that topology information is ready at that stage.
>
> > +
> > if (!plane_state->visible) {
> > /*
> > * resources are freed by dpu_crtc_assign_plane_resources(),
> >
> > --
> > 2.43.0
> >
>
> --
> With best wishes
> Dmitry
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