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Wed, 21 Jan 2026 00:02:07 -0800 (PST) From: Jun Nie Date: Wed, 21 Jan 2026 16:01:50 +0800 Subject: [PATCH v17 1/4] drm/msm/dpu: Extract plane splitting into a dedicated function Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260121-msm-next-quad-pipe-split-v17-1-6eb6d8675ca2@linaro.org> References: <20260121-msm-next-quad-pipe-split-v17-0-6eb6d8675ca2@linaro.org> In-Reply-To: <20260121-msm-next-quad-pipe-split-v17-0-6eb6d8675ca2@linaro.org> To: Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Rob Clark , Neil Armstrong Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Jun Nie X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1768982516; l=3875; i=jun.nie@linaro.org; s=20240403; h=from:subject:message-id; bh=0lT7RY7u/q/OvDkV4Xni5NMBZEHeI41cYul1o1LxOgY=; b=juT6dM7+wS6bJ686Sz7r81JjtuD2R3kEK1T/TWFYvoeqbWMGUk0aI9oIPqlOt55UihLWbNWX1 DtWFQDyewVcCrJu4auRZ6pmyKxxlrana1zeB0SWz3g0EqmIShha9sJk X-Developer-Key: i=jun.nie@linaro.org; a=ed25519; pk=MNiBt/faLPvo+iJoP1hodyY2x6ozVXL8QMptmsKg3cc= dpu_plane_atomic_check_nosspp() currently handles both plane validation and plane splitting. For better simplicity and to facilitate future refactoring, move the splitting logic into its own dedicated function. Signed-off-by: Jun Nie --- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 51 ++++++++++++++++++++++-----= ---- 1 file changed, 36 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/ms= m/disp/dpu1/dpu_plane.c index 9b7a8b46bfa91..66f240ce29d07 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -821,13 +821,8 @@ static int dpu_plane_atomic_check_nosspp(struct drm_pl= ane *plane, { int i, ret =3D 0, min_scale, max_scale; struct dpu_plane *pdpu =3D to_dpu_plane(plane); - struct dpu_kms *kms =3D _dpu_plane_get_kms(&pdpu->base); - u64 max_mdp_clk_rate =3D kms->perf.max_core_clk_rate; struct dpu_plane_state *pstate =3D to_dpu_plane_state(new_plane_state); - struct dpu_sw_pipe_cfg *pipe_cfg; - struct dpu_sw_pipe_cfg *r_pipe_cfg; struct drm_rect fb_rect =3D { 0 }; - uint32_t max_linewidth; =20 min_scale =3D FRAC_16_16(1, MAX_UPSCALE_RATIO); max_scale =3D MAX_DOWNSCALE_RATIO << 16; @@ -850,14 +845,6 @@ static int dpu_plane_atomic_check_nosspp(struct drm_pl= ane *plane, return -EINVAL; } =20 - /* move the assignment here, to ease handling to another pairs later */ - pipe_cfg =3D &pstate->pipe_cfg[0]; - r_pipe_cfg =3D &pstate->pipe_cfg[1]; - /* state->src is 16.16, src_rect is not */ - drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src); - - pipe_cfg->dst_rect =3D new_plane_state->dst; - fb_rect.x2 =3D new_plane_state->fb->width; fb_rect.y2 =3D new_plane_state->fb->height; =20 @@ -879,6 +866,34 @@ static int dpu_plane_atomic_check_nosspp(struct drm_pl= ane *plane, if (pstate->layout.plane_pitch[i] > DPU_SSPP_MAX_PITCH_SIZE) return -E2BIG; =20 + pstate->needs_qos_remap =3D drm_atomic_crtc_needs_modeset(crtc_state); + + return 0; +} + +static int dpu_plane_split(struct drm_plane *plane, + struct drm_plane_state *new_plane_state, + const struct drm_crtc_state *crtc_state) +{ + struct dpu_plane *pdpu =3D to_dpu_plane(plane); + struct dpu_kms *kms =3D _dpu_plane_get_kms(&pdpu->base); + u64 max_mdp_clk_rate =3D kms->perf.max_core_clk_rate; + struct dpu_plane_state *pstate =3D to_dpu_plane_state(new_plane_state); + struct dpu_sw_pipe_cfg *pipe_cfg; + struct dpu_sw_pipe_cfg *r_pipe_cfg; + uint32_t max_linewidth; + + if (!new_plane_state->visible) + return 0; + + /* move the assignment here, to ease handling to another pairs later */ + pipe_cfg =3D &pstate->pipe_cfg[0]; + r_pipe_cfg =3D &pstate->pipe_cfg[1]; + /* state->src is 16.16, src_rect is not */ + drm_rect_fp_to_int(&pipe_cfg->src_rect, &new_plane_state->src); + + pipe_cfg->dst_rect =3D new_plane_state->dst; + max_linewidth =3D pdpu->catalog->caps->max_linewidth; =20 drm_rect_rotate(&pipe_cfg->src_rect, @@ -910,8 +925,6 @@ static int dpu_plane_atomic_check_nosspp(struct drm_pla= ne *plane, new_plane_state->fb->width, new_plane_state->fb->height, new_plane_state->rotation); =20 - pstate->needs_qos_remap =3D drm_atomic_crtc_needs_modeset(crtc_state); - return 0; } =20 @@ -1129,6 +1142,10 @@ static int dpu_plane_atomic_check(struct drm_plane *= plane, if (ret) return ret; =20 + ret =3D dpu_plane_split(plane, new_plane_state, crtc_state); + if (ret) + return ret; + if (!new_plane_state->visible) return 0; =20 @@ -1169,6 +1186,10 @@ static int dpu_plane_virtual_atomic_check(struct drm= _plane *plane, if (ret) return ret; =20 + ret =3D dpu_plane_split(plane, plane_state, crtc_state); + if (ret) + return ret; + if (!plane_state->visible) { /* * resources are freed by dpu_crtc_assign_plane_resources(), --=20 2.43.0