From: Biju Das <biju.das.jz@bp.renesas.com>
Hi all,
This patch series adds initial support for the Renesas RZ/G3L SoC and
RZ/G3L SMARC EVK platform. The RZ/G3L device is a general-purpose
microprocessor with a quad-core CA-55, single core CM-33, Mali-G31
3-D Graphics and other peripherals.
Support for the below list of blocks is added in the SoC DTSI (r9a08g046.dtsi):
- EXT CLK
- 4X CA55
- SCIF
- CPG
- GIC
- ARMv8 Timer
This series also adds SCIF support for the RZ/G3L SMARC EVK board (r9a08g046l68-smarc.dts).
Test logs:
/ #uname -r
6.19.0-rc6-next-20260119-g31b78275d04b
/ # cat /proc/cpuinfo
processor : 0
BogoMIPS : 48.00
Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x2
CPU part : 0xd05
CPU revision : 0
processor : 1
BogoMIPS : 48.00
Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x2
CPU part : 0xd05
CPU revision : 0
processor : 2
BogoMIPS : 48.00
Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x2
CPU part : 0xd05
CPU revision : 0
processor : 3
BogoMIPS : 48.00
Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
CPU implementer : 0x41
CPU architecture: 8
CPU variant : 0x2
CPU part : 0xd05
CPU revision : 0
/ # cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
11: 262 109 324 98 GICv3 27 Level arch_timer
14: 0 0 0 0 GICv3 185 Edge error
15: 0 0 0 0 GICv3 186 Edge 11820000.dma-controller:0
16: 0 0 0 0 GICv3 187 Edge 11820000.dma-controller:1
17: 0 0 0 0 GICv3 188 Edge 11820000.dma-controller:2
18: 0 0 0 0 GICv3 189 Edge 11820000.dma-controller:3
19: 0 0 0 0 GICv3 190 Edge 11820000.dma-controller:4
20: 0 0 0 0 GICv3 191 Edge 11820000.dma-controller:5
21: 0 0 0 0 GICv3 192 Edge 11820000.dma-controller:6
22: 0 0 0 0 GICv3 193 Edge 11820000.dma-controller:7
23: 0 0 0 0 GICv3 194 Edge 11820000.dma-controller:8
24: 0 0 0 0 GICv3 195 Edge 11820000.dma-controller:9
25: 0 0 0 0 GICv3 196 Edge 11820000.dma-controller:10
26: 0 0 0 0 GICv3 197 Edge 11820000.dma-controller:11
27: 0 0 0 0 GICv3 198 Edge 11820000.dma-controller:12
28: 0 0 0 0 GICv3 199 Edge 11820000.dma-controller:13
29: 0 0 0 0 GICv3 200 Edge 11820000.dma-controller:14
30: 0 0 0 0 GICv3 201 Edge 11820000.dma-controller:15
31: 0 0 0 0 GICv3 418 Level 100ac000.serial:rx err
32: 4 0 0 0 GICv3 420 Level 100ac000.serial:rx full
33: 206 0 0 0 GICv3 421 Level 100ac000.serial:tx empty
34: 0 0 0 0 GICv3 419 Level 100ac000.serial:break
35: 13 0 0 0 GICv3 422 Level 100ac000.serial:rx ready
IPI0: 23 26 19 22 Rescheduling interrupts
IPI1: 237 385 152 90 Function call interrupts
IPI2: 0 0 0 0 CPU stop interrupts
IPI3: 0 0 0 0 CPU stop NMIs
IPI4: 0 0 0 0 Timer broadcast interrupts
IPI5: 0 0 0 0 IRQ work interrupts
IPI6: 0 0 0 0 CPU backtrace interrupts
IPI7: 0 0 0 0 KGDB roundup interrupts
/ # cat /proc/meminfo
MemTotal: 1887948 kB
MemFree: 1849056 kB
MemAvailable: 1816424 kB
/ # cat /sys/devices/soc0/family
RZ/G3L
/ # cat /sys/devices/soc0/machine
Renesas SMARC EVK version 2 based on r9a08g046l48
/ # cat /sys/devices/soc0/soc_id
r9a08g046
/ # cat /sys/devices/soc0/revision
0
Biju Das (12):
dt-bindings: serial: renesas,scif: Document RZ/G3L SoC
dt-bindings: dma: rz-dmac: Document RZ/G3L SoC
dt-bindings: soc: renesas: Document Renesas RZ/G3L SoC variants
dt-bindings: soc: renesas: Document RZ/G3L SMARC SoM and Carrier-II
EVK
dt-bindings: soc: renesas: renesas,rzg2l-sysc: Document RZ/G3L SoC
soc: renesas: rz-sysc: Add SoC identification for RZ/G3L SoC
dt-bindings: clock: Document RZ/G3L SoC
clk: renesas: Add support for RZ/G3L SoC
arm64: dts: renesas: Add initial DTSI for RZ/G3L SoC
arm64: dts: renesas: Add initial support for RZ/G3L SMARC SoM
arm64: dts: renesas: renesas-smarc2: Move usb3 nodes to board DTS
arm64: dts: renesas: Add initial device tree for RZ/G3L SMARC EVK
board
.../bindings/clock/renesas,rzg2l-cpg.yaml | 1 +
.../bindings/dma/renesas,rz-dmac.yaml | 1 +
.../bindings/serial/renesas,scif.yaml | 1 +
.../soc/renesas/renesas,rzg2l-sysc.yaml | 1 +
.../bindings/soc/renesas/renesas.yaml | 13 +
arch/arm64/boot/dts/renesas/Makefile | 2 +
arch/arm64/boot/dts/renesas/r9a08g046.dtsi | 219 +++++++++++
.../boot/dts/renesas/r9a08g046l48-smarc.dts | 41 +++
arch/arm64/boot/dts/renesas/r9a08g046l48.dtsi | 13 +
.../boot/dts/renesas/r9a09g047e57-smarc.dts | 6 +
.../boot/dts/renesas/renesas-smarc2.dtsi | 8 -
.../boot/dts/renesas/rzg3l-smarc-som.dtsi | 22 ++
drivers/clk/renesas/Kconfig | 7 +-
drivers/clk/renesas/Makefile | 1 +
drivers/clk/renesas/r9a08g046-cpg.c | 137 +++++++
drivers/clk/renesas/rzg2l-cpg.c | 6 +
drivers/clk/renesas/rzg2l-cpg.h | 1 +
drivers/soc/renesas/Kconfig | 12 +
drivers/soc/renesas/Makefile | 1 +
drivers/soc/renesas/r9a08g046-sysc.c | 91 +++++
drivers/soc/renesas/rz-sysc.c | 3 +
drivers/soc/renesas/rz-sysc.h | 1 +
include/dt-bindings/clock/r9a08g046-cpg.h | 339 ++++++++++++++++++
23 files changed, 918 insertions(+), 9 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/r9a08g046.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/r9a08g046l48-smarc.dts
create mode 100644 arch/arm64/boot/dts/renesas/r9a08g046l48.dtsi
create mode 100644 arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
create mode 100644 drivers/clk/renesas/r9a08g046-cpg.c
create mode 100644 drivers/soc/renesas/r9a08g046-sysc.c
create mode 100644 include/dt-bindings/clock/r9a08g046-cpg.h
--
2.43.0