Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs expose the
temperature calibration via SMC SIP and do not have a reset for the
TSU peripheral, and use different minimum and maximum temperature values
compared to RZ/G3E.

Although the calibration data is stored in an OTP memory, the OTP itself
is not memory-mapped, and instead, access to it is done through an OTP
controller. The OTP controller is only accessible from the secure world,
but the temperature calibration data stored in the OTP is exposed via
SMC.

V5:
 * replace hardcoded 0xFFF values with TSU_CODE_MAX
 * add arm-smccc.h include

V4:
 * pick up Geert's Reviewed-by
 * pick up John's Reviewed-by and Tested-by
 * pick up Conor's Acked-by
 * replace new macro TSU_TEMP_MASK usage with existing macro
   TSU_CODE_MAX
 * remove "Validate calibration data" comments
 * inline rzg3e_validate_calibration() into rzg3e_thermal_probe()
 * drop dts patches queued up by Geert

V3:
 * dt-bindings: rebase on top of [1]
 * dt-bindings: conditionally add `resets: false` and
   `renesas,tsu-trim: false` for renesas,r9a09g077-tsu compatibles

V2:
 * drop clk patch already present in linux-next
 * dt-bindings: merge two items into a single enum

[1]: https://patchwork.kernel.org/project/linux-pm/cover/20251020143107.13974-1-ovidiu.panait.rb@renesas.com/

Cosmin Tanislav (5):
  thermal: renesas: rzg3e: make reset optional
  thermal: renesas: rzg3e: make min and max temperature per-chip
  thermal: renesas: rzg3e: make calibration value retrieval per-chip
  dt-bindings: thermal: r9a09g047-tsu: document RZ/T2H and RZ/N2H
  thermal: renesas: rzg3e: add support for RZ/T2H and RZ/N2H

 .../thermal/renesas,r9a09g047-tsu.yaml        |  30 ++++-
 drivers/thermal/renesas/rzg3e_thermal.c       | 123 +++++++++++-------
 2 files changed, 101 insertions(+), 52 deletions(-)

-- 
2.52.0