From nobody Mon Feb 9 07:26:22 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id EB740328B45; Thu, 8 Jan 2026 19:53:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767902012; cv=none; b=jhZXAR2AWzRQAsIP5HqHP4YkK93C3TK4X+9h8IC60BIwycJ4JAEUmdN3buP6Y4LTUxI0YScJE+dex+CxSkujXi5diypmKR3ZdSAjVrtFijZTP/1o2uYClZzE+MkY75TbzJp8XRnNqEZwhstT8VNOUlgDfGKvow7GvdXPOilovWk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767902012; c=relaxed/simple; bh=r3SCEnwL1PGKy7MG5+Mt3LUNKG7vTtvBm8aR+r4SlmM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TzuJYHDQLJ1S/+pvf7gs1EW5vOGpcvwXQRPOxmy3FEUAVK4i9WcRMF+7D7eYUdmrt/YwsjLQEW8DLrS1lYdb77jdWPjV+GxmZKxp7/54Bd9PFb8z9HUhZcuX20pnDqVHuqb2/x8r+Yie99sa0gnGRTr9TcoCz4vqkrOk1m+11qk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: uYt6vzGeQFWzMfsMjEdxHA== X-CSE-MsgGUID: fvNXeq4WRbiEsRqS5DVb1g== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 09 Jan 2026 04:53:28 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.68]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id C3AE94008A2E; Fri, 9 Jan 2026 04:53:23 +0900 (JST) From: Cosmin Tanislav To: John Madieu , "Rafael J . Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Geert Uytterhoeven , Magnus Damm Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v5 1/5] thermal: renesas: rzg3e: make reset optional Date: Thu, 8 Jan 2026 21:52:19 +0200 Message-ID: <20260108195223.193531-2-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260108195223.193531-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260108195223.193531-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs do not have a reset line. Prepare for them by making it optional. Reviewed-by: Geert Uytterhoeven Reviewed-by: John Madieu Tested-by: John Madieu Signed-off-by: Cosmin Tanislav --- V5: * no changes V4: * pick up Geert's Reviewed-by * pick up John's Reviewed-by and Tested-by V3: * no changes V2: * no changes drivers/thermal/renesas/rzg3e_thermal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/renesas/rzg3e_thermal.c b/drivers/thermal/rene= sas/rzg3e_thermal.c index e66d73ca6752..86c10810e5bf 100644 --- a/drivers/thermal/renesas/rzg3e_thermal.c +++ b/drivers/thermal/renesas/rzg3e_thermal.c @@ -412,7 +412,7 @@ static int rzg3e_thermal_probe(struct platform_device *= pdev) "Clock rate %lu Hz too low (min %u Hz)\n", clk_get_rate(clk), TSU_MIN_CLOCK_RATE); =20 - priv->rstc =3D devm_reset_control_get_exclusive_deasserted(dev, NULL); + priv->rstc =3D devm_reset_control_get_optional_exclusive_deasserted(dev, = NULL); if (IS_ERR(priv->rstc)) return dev_err_probe(dev, PTR_ERR(priv->rstc), "Failed to get/deassert reset control\n"); --=20 2.52.0 From nobody Mon Feb 9 07:26:22 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 8A83B327206; Thu, 8 Jan 2026 19:53:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767902018; cv=none; b=Vbi1PJ3iUogwJx9vyrsAS/pLi1yw7HDFj88oAO6MSDGhP4eVF0cqIKb5KbtYhYa1p62t2Hrhj3iCzFszvtgL0TD8I1sLnMpewS5FcQlHhhfDmGCG4dDulhlamRq7A39RhJSPRSHy4e6gKKyrtlc7LA47D3wDG4AbRISQAxW83OU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767902018; c=relaxed/simple; bh=8GPukBzyzonRme1F+reTq27VoIs4/pRuWr1SYXTxWOc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=N+4ihKd4CxlyoSo+wKK2B3Cly1+cQ6t3Zlp5/lDF932gXwZPdB4Oj821rrHmmBpr8bT1C0zf7s8gD4Th5kL4g8C47hwzH2rCK49+zYcr6Px7yExC/wslQ626iLMtuvSVGeIPkGMjJQDsMFwHshA+X2U3M8c496IL76uyyi32kHQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: GUFMR25ET1ijklJGQhDmaQ== X-CSE-MsgGUID: YnONpCNrQumzOHUnwau7Aw== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 09 Jan 2026 04:53:35 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.68]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 3ADA8475F1F5; Fri, 9 Jan 2026 04:53:29 +0900 (JST) From: Cosmin Tanislav To: John Madieu , "Rafael J . Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Geert Uytterhoeven , Magnus Damm Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v5 2/5] thermal: renesas: rzg3e: make min and max temperature per-chip Date: Thu, 8 Jan 2026 21:52:20 +0200 Message-ID: <20260108195223.193531-3-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260108195223.193531-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260108195223.193531-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have different minimum and maximum temperatures compared to the already supported RZ/G3E. Prepare for them by moving these into a chip-specific struct. Reviewed-by: Geert Uytterhoeven Reviewed-by: John Madieu Tested-by: John Madieu Signed-off-by: Cosmin Tanislav --- V5: * no changes V4: * pick up Geert's Reviewed-by * pick up John's Reviewed-by and Tested-by V3: * no changes V2: * no changes drivers/thermal/renesas/rzg3e_thermal.c | 35 ++++++++++++++++--------- 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/drivers/thermal/renesas/rzg3e_thermal.c b/drivers/thermal/rene= sas/rzg3e_thermal.c index 86c10810e5bf..3c9ff5e43d7e 100644 --- a/drivers/thermal/renesas/rzg3e_thermal.c +++ b/drivers/thermal/renesas/rzg3e_thermal.c @@ -62,8 +62,6 @@ #define TSU_SICR_CMPCLR BIT(1) =20 /* Temperature calculation constants from datasheet */ -#define TSU_TEMP_D (-41) -#define TSU_TEMP_E 126 #define TSU_CODE_MAX 0xFFF =20 /* Timing specifications from datasheet */ @@ -72,6 +70,11 @@ #define TSU_POLL_DELAY_US 10 /* Polling interval */ #define TSU_MIN_CLOCK_RATE 24000000 /* TSU_PCLK minimum 24MHz */ =20 +struct rzg3e_thermal_info { + int temp_d_mc; + int temp_e_mc; +}; + /** * struct rzg3e_thermal_priv - RZ/G3E TSU private data * @base: TSU register base @@ -79,6 +82,7 @@ * @syscon: regmap for calibration values * @zone: thermal zone device * @rstc: reset control + * @info: chip type specific information * @trmval0: calibration value 0 (b) * @trmval1: calibration value 1 (c) * @trim_offset: offset for trim registers in syscon @@ -90,6 +94,7 @@ struct rzg3e_thermal_priv { struct regmap *syscon; struct thermal_zone_device *zone; struct reset_control *rstc; + const struct rzg3e_thermal_info *info; u16 trmval0; u16 trmval1; u32 trim_offset; @@ -161,17 +166,17 @@ static void rzg3e_thermal_power_off(struct rzg3e_ther= mal_priv *priv) */ static int rzg3e_thermal_code_to_temp(struct rzg3e_thermal_priv *priv, u16= code) { - int temp_e_mc =3D TSU_TEMP_E * MILLIDEGREE_PER_DEGREE; - int temp_d_mc =3D TSU_TEMP_D * MILLIDEGREE_PER_DEGREE; + const struct rzg3e_thermal_info *info =3D priv->info; s64 numerator, denominator; int temp_mc; =20 - numerator =3D (temp_e_mc - temp_d_mc) * (s64)(code - priv->trmval0); + numerator =3D (info->temp_e_mc - info->temp_d_mc) * + (s64)(code - priv->trmval0); denominator =3D priv->trmval1 - priv->trmval0; =20 - temp_mc =3D div64_s64(numerator, denominator) + temp_d_mc; + temp_mc =3D div64_s64(numerator, denominator) + info->temp_d_mc; =20 - return clamp(temp_mc, temp_d_mc, temp_e_mc); + return clamp(temp_mc, info->temp_d_mc, info->temp_e_mc); } =20 /* @@ -180,13 +185,12 @@ static int rzg3e_thermal_code_to_temp(struct rzg3e_th= ermal_priv *priv, u16 code) */ static u16 rzg3e_thermal_temp_to_code(struct rzg3e_thermal_priv *priv, int= temp_mc) { - int temp_e_mc =3D TSU_TEMP_E * MILLIDEGREE_PER_DEGREE; - int temp_d_mc =3D TSU_TEMP_D * MILLIDEGREE_PER_DEGREE; + const struct rzg3e_thermal_info *info =3D priv->info; s64 numerator, denominator; s64 code; =20 - numerator =3D (temp_mc - temp_d_mc) * (priv->trmval1 - priv->trmval0); - denominator =3D temp_e_mc - temp_d_mc; + numerator =3D (temp_mc - info->temp_d_mc) * (priv->trmval1 - priv->trmval= 0); + denominator =3D info->temp_e_mc - info->temp_d_mc; =20 code =3D div64_s64(numerator, denominator) + priv->trmval0; =20 @@ -392,6 +396,8 @@ static int rzg3e_thermal_probe(struct platform_device *= pdev) return ret; platform_set_drvdata(pdev, priv); =20 + priv->info =3D device_get_match_data(dev); + priv->base =3D devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(priv->base)) return PTR_ERR(priv->base); @@ -526,8 +532,13 @@ static const struct dev_pm_ops rzg3e_thermal_pm_ops = =3D { SYSTEM_SLEEP_PM_OPS(rzg3e_thermal_suspend, rzg3e_thermal_resume) }; =20 +static const struct rzg3e_thermal_info rzg3e_thermal_info =3D { + .temp_d_mc =3D -41000, + .temp_e_mc =3D 126000, +}; + static const struct of_device_id rzg3e_thermal_dt_ids[] =3D { - { .compatible =3D "renesas,r9a09g047-tsu" }, + { .compatible =3D "renesas,r9a09g047-tsu", .data =3D &rzg3e_thermal_info = }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, rzg3e_thermal_dt_ids); --=20 2.52.0 From nobody Mon Feb 9 07:26:22 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id AC63832C92D; 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dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: IzwKbpdnRlGeoZQ27+3h6g== X-CSE-MsgGUID: ywJwhMhBQRC/DoPF+cKXLA== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 09 Jan 2026 04:53:41 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.68]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 43D07475F1F5; Fri, 9 Jan 2026 04:53:35 +0900 (JST) From: Cosmin Tanislav To: John Madieu , "Rafael J . Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Geert Uytterhoeven , Magnus Damm Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v5 3/5] thermal: renesas: rzg3e: make calibration value retrieval per-chip Date: Thu, 8 Jan 2026 21:52:21 +0200 Message-ID: <20260108195223.193531-4-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260108195223.193531-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260108195223.193531-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs expose the temperature calibration data via SMC SIP calls. To prepare for supporting these SoCs, do the following changes. Rename rzg3e_thermal_parse_dt() to rzg3e_thermal_get_syscon_trim(). Move the syscon usage out of rzg3e_thermal_get_calibration() and into rzg3e_thermal_get_syscon_trim() and remove single-use variables from the private state. Place a pointer to rzg3e_thermal_get_syscon_trim() into the chip-specific struct, and use it in the probe function to retrieve the calibration values. Now that syscon usage has been moved out of rzg3e_thermal_get_calibration(), remove it and inline the calibration validation into the probe function. Also, reuse the TSU_CODE_MAX macro to mask the calibration values, as GEMASK(11, 0) and 0xFFF are equivalent, and replace the hardcoded 0xFFF with TSU_CODE_MAX in the calibration validation. Reviewed-by: John Madieu Tested-by: John Madieu Signed-off-by: Cosmin Tanislav Reviewed-by: Geert Uytterhoeven --- V5: * replace hardcoded 0xFFF values with TSU_CODE_MAX V4: * pick up John's Reviewed-by and Tested-by * replace new macro TSU_TEMP_MASK usage with existing macro TSU_CODE_MAX * remove "Validate calibration data" comments * inline rzg3e_validate_calibration() into rzg3e_thermal_probe() V3: * no changes V2: * no changes drivers/thermal/renesas/rzg3e_thermal.c | 79 +++++++++++-------------- 1 file changed, 33 insertions(+), 46 deletions(-) diff --git a/drivers/thermal/renesas/rzg3e_thermal.c b/drivers/thermal/rene= sas/rzg3e_thermal.c index 3c9ff5e43d7e..97c4053303e0 100644 --- a/drivers/thermal/renesas/rzg3e_thermal.c +++ b/drivers/thermal/renesas/rzg3e_thermal.c @@ -70,7 +70,10 @@ #define TSU_POLL_DELAY_US 10 /* Polling interval */ #define TSU_MIN_CLOCK_RATE 24000000 /* TSU_PCLK minimum 24MHz */ =20 +struct rzg3e_thermal_priv; + struct rzg3e_thermal_info { + int (*get_trim)(struct rzg3e_thermal_priv *priv); int temp_d_mc; int temp_e_mc; }; @@ -91,13 +94,11 @@ struct rzg3e_thermal_info { struct rzg3e_thermal_priv { void __iomem *base; struct device *dev; - struct regmap *syscon; struct thermal_zone_device *zone; struct reset_control *rstc; const struct rzg3e_thermal_info *info; u16 trmval0; u16 trmval1; - u32 trim_offset; struct mutex lock; }; =20 @@ -334,48 +335,30 @@ static const struct thermal_zone_device_ops rzg3e_tz_= ops =3D { .set_trips =3D rzg3e_thermal_set_trips, }; =20 -static int rzg3e_thermal_get_calibration(struct rzg3e_thermal_priv *priv) -{ - u32 val; - int ret; - - /* Read calibration values from syscon */ - ret =3D regmap_read(priv->syscon, priv->trim_offset, &val); - if (ret) - return ret; - priv->trmval0 =3D val & GENMASK(11, 0); - - ret =3D regmap_read(priv->syscon, priv->trim_offset + 4, &val); - if (ret) - return ret; - priv->trmval1 =3D val & GENMASK(11, 0); - - /* Validate calibration data */ - if (!priv->trmval0 || !priv->trmval1 || - priv->trmval0 =3D=3D priv->trmval1 || - priv->trmval0 =3D=3D 0xFFF || priv->trmval1 =3D=3D 0xFFF) { - dev_err(priv->dev, "Invalid calibration: b=3D0x%03x, c=3D0x%03x\n", - priv->trmval0, priv->trmval1); - return -EINVAL; - } - - dev_dbg(priv->dev, "Calibration: b=3D0x%03x (%u), c=3D0x%03x (%u)\n", - priv->trmval0, priv->trmval0, priv->trmval1, priv->trmval1); - - return 0; -} - -static int rzg3e_thermal_parse_dt(struct rzg3e_thermal_priv *priv) +static int rzg3e_thermal_get_syscon_trim(struct rzg3e_thermal_priv *priv) { struct device_node *np =3D priv->dev->of_node; + struct regmap *syscon; u32 offset; + int ret; + u32 val; =20 - priv->syscon =3D syscon_regmap_lookup_by_phandle_args(np, "renesas,tsu-tr= im", 1, &offset); - if (IS_ERR(priv->syscon)) - return dev_err_probe(priv->dev, PTR_ERR(priv->syscon), + syscon =3D syscon_regmap_lookup_by_phandle_args(np, "renesas,tsu-trim", 1= , &offset); + if (IS_ERR(syscon)) + return dev_err_probe(priv->dev, PTR_ERR(syscon), "Failed to parse renesas,tsu-trim\n"); =20 - priv->trim_offset =3D offset; + /* Read calibration values from syscon */ + ret =3D regmap_read(syscon, offset, &val); + if (ret) + return ret; + priv->trmval0 =3D val & TSU_CODE_MAX; + + ret =3D regmap_read(syscon, offset + 4, &val); + if (ret) + return ret; + priv->trmval1 =3D val & TSU_CODE_MAX; + return 0; } =20 @@ -402,11 +385,20 @@ static int rzg3e_thermal_probe(struct platform_device= *pdev) if (IS_ERR(priv->base)) return PTR_ERR(priv->base); =20 - /* Parse device tree for trim register info */ - ret =3D rzg3e_thermal_parse_dt(priv); + ret =3D priv->info->get_trim(priv); if (ret) return ret; =20 + if (!priv->trmval0 || !priv->trmval1 || + priv->trmval0 =3D=3D priv->trmval1 || + priv->trmval0 =3D=3D TSU_CODE_MAX || priv->trmval1 =3D=3D TSU_CODE_MA= X) + return dev_err_probe(priv->dev, -EINVAL, + "Invalid calibration: b=3D0x%03x, c=3D0x%03x\n", + priv->trmval0, priv->trmval1); + + dev_dbg(priv->dev, "Calibration: b=3D0x%03x (%u), c=3D0x%03x (%u)\n", + priv->trmval0, priv->trmval0, priv->trmval1, priv->trmval1); + /* Get clock to verify frequency - clock is managed by power domain */ clk =3D devm_clk_get(dev, NULL); if (IS_ERR(clk)) @@ -423,12 +415,6 @@ static int rzg3e_thermal_probe(struct platform_device = *pdev) return dev_err_probe(dev, PTR_ERR(priv->rstc), "Failed to get/deassert reset control\n"); =20 - /* Get calibration data */ - ret =3D rzg3e_thermal_get_calibration(priv); - if (ret) - return dev_err_probe(dev, ret, - "Failed to get valid calibration data\n"); - /* Get comparison interrupt */ irq =3D platform_get_irq_byname(pdev, "adcmpi"); if (irq < 0) @@ -533,6 +519,7 @@ static const struct dev_pm_ops rzg3e_thermal_pm_ops =3D= { }; =20 static const struct rzg3e_thermal_info rzg3e_thermal_info =3D { + .get_trim =3D rzg3e_thermal_get_syscon_trim, .temp_d_mc =3D -41000, .temp_e_mc =3D 126000, }; --=20 2.52.0 From nobody Mon Feb 9 07:26:22 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9EFCA2E9729; Thu, 8 Jan 2026 19:53:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767902034; cv=none; b=kZNcqopiifzitqO8Rlu0HvVTd91bVvfIQy/gEwvoh78aGk0ievIJFmm4yR5iNZs6rdBKBKQAKgWts/N1wYYBVbP/3+YgYyvV0hP5WOCBID98TWUN3iuxpKTZlOdpYBhfvkLbtIOAvem1RicxUlJWaVjPs4QaTCR2q46AX1Q7fhY= ARC-Message-Signature: i=1; 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Fri, 9 Jan 2026 04:53:41 +0900 (JST) From: Cosmin Tanislav To: John Madieu , "Rafael J . Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Geert Uytterhoeven , Magnus Damm Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Cosmin Tanislav , Conor Dooley Subject: [PATCH v5 4/5] dt-bindings: thermal: r9a09g047-tsu: document RZ/T2H and RZ/N2H Date: Thu, 8 Jan 2026 21:52:22 +0200 Message-ID: <20260108195223.193531-5-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260108195223.193531-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260108195223.193531-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs include a Temperature Sensor Unit (TSU). The device provides real-time temperature measurements for thermal management, utilizing a single dedicated channel for temperature sensing. Compared to the previously supported RZ/G3E, the RZ/T2H and RZ/N2H SoCs do not have a reset for the TSU peripheral, and the OTP data is exposed via ARM SMC, as opposed to a system register. Acked-by: Conor Dooley Reviewed-by: Geert Uytterhoeven Signed-off-by: Cosmin Tanislav --- V5: * no changes V4: * pick up Geert's Reviewed-by * pick up Conor's Acked-by V3: * rebase on top of [1] * conditionally add `resets: false` and `renesas,tsu-trim: false` for renesas,r9a09g077-tsu compatibles V2: * merge two items into a single enum .../thermal/renesas,r9a09g047-tsu.yaml | 30 +++++++++++++++++-- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-ts= u.yaml b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.ya= ml index befdc8b7a082..a04e5048eadf 100644 --- a/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml +++ b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml @@ -17,10 +17,15 @@ description: properties: compatible: oneOf: - - const: renesas,r9a09g047-tsu # RZ/G3E + - enum: + - renesas,r9a09g047-tsu # RZ/G3E + - renesas,r9a09g077-tsu # RZ/T2H - items: - const: renesas,r9a09g057-tsu # RZ/V2H - const: renesas,r9a09g047-tsu # RZ/G3E + - items: + - const: renesas,r9a09g087-tsu # RZ/N2H + - const: renesas,r9a09g077-tsu # RZ/T2H =20 reg: maxItems: 1 @@ -63,12 +68,31 @@ required: - compatible - reg - clocks - - resets - power-domains - interrupts - interrupt-names - "#thermal-sensor-cells" - - renesas,tsu-trim + +allOf: + - if: + properties: + compatible: + contains: + const: renesas,r9a09g047-tsu + then: + required: + - resets + - renesas,tsu-trim + + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-tsu + then: + properties: + resets: false + renesas,tsu-trim: false =20 additionalProperties: false =20 --=20 2.52.0 From nobody Mon Feb 9 07:26:22 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 830DF32AAC5; Thu, 8 Jan 2026 19:53:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767902047; cv=none; b=u8beHNnLq+yoMPc5gTjP/mPHzyUGDkxR63PLn/vhDpZSafCkLY1Ze0DeuEsNWfIK/nFIRXkJltXxYU7iyRiUWZ/HYpXowmz6kMXdYwtT3ZKVVL/FxbmX2c0phdrT1m1N323udAq78fN6v8yyaTqYcvOeFmp5R5uS0X/PBFN3FtY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767902047; c=relaxed/simple; bh=hu14PNedND/UF//Ir2g4zjI9/33xmnYKUgJ5bFvFga0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KGBi2znliYpBou+iQkEy63HISqJwlanp7gMsZuC7K4SdiokyGVrbVsSJEm8AgfBXN2imxdMFe0KhuYyjXmeJwiFaQdw3PFOonyKfavVF5Rn5Zk4zRGYqw5AvPyfJAHPS4iJ+poD534hZIkLSG4IUt4vn6tyO0G0hgI4ELN+ECK0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: ioIatjtFS5uo3SRN1voJjQ== X-CSE-MsgGUID: Y+V5oaFaR9S/RtTKUQkqdA== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 09 Jan 2026 04:53:53 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.68]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 61B76475F1F5; Fri, 9 Jan 2026 04:53:48 +0900 (JST) From: Cosmin Tanislav To: John Madieu , "Rafael J . Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Geert Uytterhoeven , Magnus Damm Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v5 5/5] thermal: renesas: rzg3e: add support for RZ/T2H and RZ/N2H Date: Thu, 8 Jan 2026 21:52:23 +0200 Message-ID: <20260108195223.193531-6-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260108195223.193531-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260108195223.193531-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs expose the temperature calibration via SMC SIP and do not have a reset for the TSU peripheral, and use different minimum and maximum temperature values compared to the already supported RZ/G3E. Although the calibration data is stored in an OTP memory, the OTP itself is not memory-mapped, access to it is done through an OTP controller. The OTP controller is only accessible from the secure world, but the temperature calibration data stored in the OTP is exposed via SMC. Add support for retrieving the calibration data using arm_smcc_smc(). Add a compatible for RZ/T2H, RZ/N2H can use it as a fallback. Reviewed-by: John Madieu Tested-by: John Madieu Signed-off-by: Cosmin Tanislav --- V5: * add arm-smccc.h include V4: * pick up John's Reviewed-by and Tested-by * replace new macro TSU_TEMP_MASK usage with existing macro TSU_CODE_MAX V3: * no changes V2: * no changes drivers/thermal/renesas/rzg3e_thermal.c | 27 +++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/thermal/renesas/rzg3e_thermal.c b/drivers/thermal/rene= sas/rzg3e_thermal.c index 97c4053303e0..dde021e283b7 100644 --- a/drivers/thermal/renesas/rzg3e_thermal.c +++ b/drivers/thermal/renesas/rzg3e_thermal.c @@ -4,6 +4,7 @@ * * Copyright (C) 2025 Renesas Electronics Corporation */ +#include #include #include #include @@ -70,6 +71,10 @@ #define TSU_POLL_DELAY_US 10 /* Polling interval */ #define TSU_MIN_CLOCK_RATE 24000000 /* TSU_PCLK minimum 24MHz */ =20 +#define RZ_SIP_SVC_GET_SYSTSU 0x82000022 +#define OTP_TSU_REG_ADR_TEMPHI 0x01DC +#define OTP_TSU_REG_ADR_TEMPLO 0x01DD + struct rzg3e_thermal_priv; =20 struct rzg3e_thermal_info { @@ -362,6 +367,21 @@ static int rzg3e_thermal_get_syscon_trim(struct rzg3e_= thermal_priv *priv) return 0; } =20 +static int rzg3e_thermal_get_smc_trim(struct rzg3e_thermal_priv *priv) +{ + struct arm_smccc_res local_res; + + arm_smccc_smc(RZ_SIP_SVC_GET_SYSTSU, OTP_TSU_REG_ADR_TEMPLO, + 0, 0, 0, 0, 0, 0, &local_res); + priv->trmval0 =3D local_res.a0 & TSU_CODE_MAX; + + arm_smccc_smc(RZ_SIP_SVC_GET_SYSTSU, OTP_TSU_REG_ADR_TEMPHI, + 0, 0, 0, 0, 0, 0, &local_res); + priv->trmval1 =3D local_res.a0 & TSU_CODE_MAX; + + return 0; +} + static int rzg3e_thermal_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; @@ -524,8 +544,15 @@ static const struct rzg3e_thermal_info rzg3e_thermal_i= nfo =3D { .temp_e_mc =3D 126000, }; =20 +static const struct rzg3e_thermal_info rzt2h_thermal_info =3D { + .get_trim =3D rzg3e_thermal_get_smc_trim, + .temp_d_mc =3D -40000, + .temp_e_mc =3D 125000, +}; + static const struct of_device_id rzg3e_thermal_dt_ids[] =3D { { .compatible =3D "renesas,r9a09g047-tsu", .data =3D &rzg3e_thermal_info = }, + { .compatible =3D "renesas,r9a09g077-tsu", .data =3D &rzt2h_thermal_info = }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, rzg3e_thermal_dt_ids); --=20 2.52.0