The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have three
DMAC instances. Compared to the previously supported RZ/V2H, these SoCs
are missing the error interrupt line and the reset lines, and they use
a different ICU IP.

V4:
 * drop device tree patches already queued up by Geert
 * pick up Geert's Reviewed-by
 * dma_req_no_default -> default_dma_req_no
 * register_dma_req -> icu_register_dma_req
 * rz_dmac_common_info -> rz_dmac_generic_info

V3:
 * replace -1 with direct usage of dma_req_no_default and remove the
   check inside rz_dmac_set_dma_req_no()
 * pick up Rob's Reviewed-by tag

V2:
 * remove notes

Cosmin Tanislav (4):
  dmaengine: sh: rz_dmac: make error interrupt optional
  dmaengine: sh: rz_dmac: make register_dma_req() chip-specific
  dt-bindings: dma: renesas,rz-dmac: document RZ/{T2H,N2H}
  dmaengine: sh: rz_dmac: add RZ/{T2H,N2H} support

 .../bindings/dma/renesas,rz-dmac.yaml         | 100 ++++++++++++++----
 drivers/dma/sh/rz-dmac.c                      |  91 +++++++++-------
 2 files changed, 134 insertions(+), 57 deletions(-)

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2.52.0