From nobody Mon Feb 9 04:33:47 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2BD033385BF; Mon, 5 Jan 2026 11:50:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767613858; cv=none; b=GVy7kwW9sVnllSGHSNdBFTCC/97fM8q7bH3DoUeupjAJAi7U+C9kDrHCLELxjFp/Jymq4mRkoyYfuUKaRj/8zrFYJOsDRDok+Hb/i/G15JNiYN96lWkQDFiYYMlRm6j1z2npSrBv8wrjkEW13DXc/R+BsFojIGQl4VZ7dX85uAs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767613858; c=relaxed/simple; bh=zjM2wzVUidoSsGNlBrMAr26NSnnXT8gNMLOQ4iBf0xQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uYdj1mCGOeYyUliaBzr0cqT5ntdbISGpteJPsCM1C812wO0QIop13zFddNqJ5HZXDsYHWom6XJJMsRDQTV9gJlF5uvV7kGi8gizAzVuvBtpWx5k0/fhhQlgkJoeN07zJRlIWGoNmuDylE5ju0g/65Xrej9L/GAOE6G3H3Fu4RUQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: hwP48P8gQ7KlP8lvNaezDw== X-CSE-MsgGUID: RF3Pg/HtRbO2W/Riiwdywg== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 05 Jan 2026 20:45:46 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.160]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 6712C41AF7E7; Mon, 5 Jan 2026 20:45:42 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH v4 1/4] dmaengine: sh: rz_dmac: make error interrupt optional Date: Mon, 5 Jan 2026 13:44:42 +0200 Message-ID: <20260105114445.878262-2-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260105114445.878262-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260105114445.878262-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs do not have an error interrupt for the DMACs, and the current driver implementation does not make much use of it. To prepare for adding support for these SoCs, do not error out if the error interrupt is missing. Signed-off-by: Cosmin Tanislav Reviewed-by: Geert Uytterhoeven --- V4: * pick up Geert's Reviewed-by V3: * no changes V2: * remove notes drivers/dma/sh/rz-dmac.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 9e5f088355e2..801e363f341f 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -959,16 +959,15 @@ static int rz_dmac_probe(struct platform_device *pdev) } =20 /* Register interrupt handler for error */ - irq =3D platform_get_irq_byname(pdev, irqname); - if (irq < 0) - return irq; - - ret =3D devm_request_irq(&pdev->dev, irq, rz_dmac_irq_handler, 0, - irqname, NULL); - if (ret) { - dev_err(&pdev->dev, "failed to request IRQ %u (%d)\n", - irq, ret); - return ret; + irq =3D platform_get_irq_byname_optional(pdev, irqname); + if (irq > 0) { + ret =3D devm_request_irq(&pdev->dev, irq, rz_dmac_irq_handler, 0, + irqname, NULL); + if (ret) { + dev_err(&pdev->dev, "failed to request IRQ %u (%d)\n", + irq, ret); + return ret; + } } =20 /* Initialize the channels. */ --=20 2.52.0 From nobody Mon Feb 9 04:33:47 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 590663385B9; Mon, 5 Jan 2026 11:50:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767613857; cv=none; b=BSDCXxAkHrsoA8s4SgkOFBz5665Ul1H2H+q+TXeCeLV2EJbwO45Kv73aQ39fzPdLP7Wi9MSjybVg+Lxt1mGDULeaalCjZ4C7yNpn0+3GfdFwdf5HAH0PyS6J/ZeUSfbV8HCWDkdFkXXMkXwnwRV0QV/QQqbfASlGVwaTpnJeF8U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767613857; c=relaxed/simple; bh=bn3WG61uhmNeWFU1uhItvslzfycMZHQ8/mXEERSSoAo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pNKfzkMQPQs9PA4LDqFQJiwWHw7rBpa/FuSCd3FaFOHZDpruG8Jntfh3wzDUZrNum7O+2WdbiyVJjuDGYQoIBAcFG7Bd+vo79hfGuhgheHnBVGceQNksLg3gw1eAxwQe7zksWp6ix9qBKw91CEYzR7tMmML4jrETOMbe/lIxV08= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: YHK6/s9lS5OjUOOFoaJJ9Q== X-CSE-MsgGUID: iPSEZjj2Ta+uwq56yjJnNg== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 05 Jan 2026 20:45:52 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.160]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 0BC2941AF7ED; Mon, 5 Jan 2026 20:45:47 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH v4 2/4] dmaengine: sh: rz_dmac: make register_dma_req() chip-specific Date: Mon, 5 Jan 2026 13:44:43 +0200 Message-ID: <20260105114445.878262-3-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260105114445.878262-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260105114445.878262-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs use a completely different ICU unit compared to RZ/V2H, which requires a separate implementation. To prepare for adding support for these SoCs, add a chip-specific structure and put a pointer to the rzv2h_icu_register_dma_req() function in the .register_dma_req field of the chip-specific structure to allow for other implementations. Do the same for the default request value, RZV2H_ICU_DMAC_REQ_NO_DEFAULT, and place it into .dma_req_no_default. While at it, factor out the logic that calls .register_dma_req() or rz_dmac_set_dmars_register() into a separate function to remove some code duplication. Signed-off-by: Cosmin Tanislav Reviewed-by: Geert Uytterhoeven --- V4: * dma_req_no_default -> default_dma_req_no * register_dma_req -> icu_register_dma_req * rz_dmac_common_info -> rz_dmac_generic_info * pick up Geert's Reviewed-by V3: * replace -1 with direct usage of dma_req_no_default and remove the check inside rz_dmac_set_dma_req_no() V2: * remove notes drivers/dma/sh/rz-dmac.c | 65 ++++++++++++++++++++++------------------ 1 file changed, 36 insertions(+), 29 deletions(-) diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 801e363f341f..b3e38bd294b2 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -95,9 +95,16 @@ struct rz_dmac_icu { u8 dmac_index; }; =20 +struct rz_dmac_info { + void (*icu_register_dma_req)(struct platform_device *icu_dev, + u8 dmac_index, u8 dmac_channel, u16 req_no); + u16 default_dma_req_no; +}; + struct rz_dmac { struct dma_device engine; struct rz_dmac_icu icu; + const struct rz_dmac_info *info; struct device *dev; struct reset_control *rstc; void __iomem *base; @@ -106,8 +113,6 @@ struct rz_dmac { unsigned int n_channels; struct rz_dmac_chan *channels; =20 - bool has_icu; - DECLARE_BITMAP(modules, 1024); }; =20 @@ -319,6 +324,16 @@ static void rz_dmac_set_dmars_register(struct rz_dmac = *dmac, int nr, u32 dmars) rz_dmac_ext_writel(dmac, dmars32, dmars_offset); } =20 +static void rz_dmac_set_dma_req_no(struct rz_dmac *dmac, unsigned int inde= x, + int req_no) +{ + if (dmac->info->icu_register_dma_req) + dmac->info->icu_register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, + index, req_no); + else + rz_dmac_set_dmars_register(dmac, index, req_no); +} + static void rz_dmac_prepare_desc_for_memcpy(struct rz_dmac_chan *channel) { struct dma_chan *chan =3D &channel->vc.chan; @@ -336,13 +351,7 @@ static void rz_dmac_prepare_desc_for_memcpy(struct rz_= dmac_chan *channel) lmdesc->chext =3D 0; lmdesc->header =3D HEADER_LV; =20 - if (dmac->has_icu) { - rzv2h_icu_register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, - channel->index, - RZV2H_ICU_DMAC_REQ_NO_DEFAULT); - } else { - rz_dmac_set_dmars_register(dmac, channel->index, 0); - } + rz_dmac_set_dma_req_no(dmac, channel->index, dmac->info->default_dma_req_= no); =20 channel->chcfg =3D chcfg; channel->chctrl =3D CHCTRL_STG | CHCTRL_SETEN; @@ -393,12 +402,7 @@ static void rz_dmac_prepare_descs_for_slave_sg(struct = rz_dmac_chan *channel) =20 channel->lmdesc.tail =3D lmdesc; =20 - if (dmac->has_icu) { - rzv2h_icu_register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, - channel->index, channel->mid_rid); - } else { - rz_dmac_set_dmars_register(dmac, channel->index, channel->mid_rid); - } + rz_dmac_set_dma_req_no(dmac, channel->index, channel->mid_rid); =20 channel->chctrl =3D CHCTRL_SETEN; } @@ -676,13 +680,7 @@ static void rz_dmac_device_synchronize(struct dma_chan= *chan) if (ret < 0) dev_warn(dmac->dev, "DMA Timeout"); =20 - if (dmac->has_icu) { - rzv2h_icu_register_dma_req(dmac->icu.pdev, dmac->icu.dmac_index, - channel->index, - RZV2H_ICU_DMAC_REQ_NO_DEFAULT); - } else { - rz_dmac_set_dmars_register(dmac, channel->index, 0); - } + rz_dmac_set_dma_req_no(dmac, channel->index, dmac->info->default_dma_req_= no); } =20 /* @@ -873,14 +871,13 @@ static int rz_dmac_parse_of_icu(struct device *dev, s= truct rz_dmac *dmac) uint32_t dmac_index; int ret; =20 - ret =3D of_parse_phandle_with_fixed_args(np, "renesas,icu", 1, 0, &args); - if (ret =3D=3D -ENOENT) + if (!dmac->info->icu_register_dma_req) return 0; + + ret =3D of_parse_phandle_with_fixed_args(np, "renesas,icu", 1, 0, &args); if (ret) return ret; =20 - dmac->has_icu =3D true; - dmac->icu.pdev =3D of_find_device_by_node(args.np); of_node_put(args.np); if (!dmac->icu.pdev) { @@ -935,6 +932,7 @@ static int rz_dmac_probe(struct platform_device *pdev) if (!dmac) return -ENOMEM; =20 + dmac->info =3D device_get_match_data(&pdev->dev); dmac->dev =3D &pdev->dev; platform_set_drvdata(pdev, dmac); =20 @@ -952,7 +950,7 @@ static int rz_dmac_probe(struct platform_device *pdev) if (IS_ERR(dmac->base)) return PTR_ERR(dmac->base); =20 - if (!dmac->has_icu) { + if (!dmac->info->icu_register_dma_req) { dmac->ext_base =3D devm_platform_ioremap_resource(pdev, 1); if (IS_ERR(dmac->ext_base)) return PTR_ERR(dmac->ext_base); @@ -1072,9 +1070,18 @@ static void rz_dmac_remove(struct platform_device *p= dev) pm_runtime_disable(&pdev->dev); } =20 +static const struct rz_dmac_info rz_dmac_v2h_info =3D { + .icu_register_dma_req =3D rzv2h_icu_register_dma_req, + .default_dma_req_no =3D RZV2H_ICU_DMAC_REQ_NO_DEFAULT, +}; + +static const struct rz_dmac_info rz_dmac_generic_info =3D { + .default_dma_req_no =3D 0, +}; + static const struct of_device_id of_rz_dmac_match[] =3D { - { .compatible =3D "renesas,r9a09g057-dmac", }, - { .compatible =3D "renesas,rz-dmac", }, + { .compatible =3D "renesas,r9a09g057-dmac", .data =3D &rz_dmac_v2h_info }, + { .compatible =3D "renesas,rz-dmac", .data =3D &rz_dmac_generic_info }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, of_rz_dmac_match); --=20 2.52.0 From nobody Mon Feb 9 04:33:47 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A2D6C2F261F; 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dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: EKTVPgWHQl6uhGQ0WpmPrA== X-CSE-MsgGUID: qD2P7+7USpOQVnMVTtgGNg== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 05 Jan 2026 20:46:00 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.160]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 7D08141AF7F0; Mon, 5 Jan 2026 20:45:55 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH v4 3/4] dt-bindings: dma: renesas,rz-dmac: document RZ/{T2H,N2H} Date: Mon, 5 Jan 2026 13:44:44 +0200 Message-ID: <20260105114445.878262-4-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260105114445.878262-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260105114445.878262-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have three DMAC instances. Compared to the previously supported RZ/V2H, these SoCs are missing the error interrupt line and the reset lines, and they use a different ICU IP. Document them, and use RZ/T2H as a fallback for RZ/N2H as the DMACs are entirely compatible. Signed-off-by: Cosmin Tanislav Reviewed-by: Rob Herring (Arm) Reviewed-by: Geert Uytterhoeven --- V4: * pick up Geert's Reviewed-by V3: * pick up Rob's Reviewed-by tag V2: * remove notes .../bindings/dma/renesas,rz-dmac.yaml | 100 ++++++++++++++---- 1 file changed, 82 insertions(+), 18 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/D= ocumentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index d137b9cbaee9..3398868bdaf3 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -29,6 +29,13 @@ properties: =20 - const: renesas,r9a09g057-dmac # RZ/V2H(P) =20 + - const: renesas,r9a09g077-dmac # RZ/T2H + + - items: + - enum: + - renesas,r9a09g087-dmac # RZ/N2H + - const: renesas,r9a09g077-dmac + reg: items: - description: Control and channel register block @@ -36,27 +43,12 @@ properties: minItems: 1 =20 interrupts: + minItems: 16 maxItems: 17 =20 interrupt-names: - items: - - const: error - - const: ch0 - - const: ch1 - - const: ch2 - - const: ch3 - - const: ch4 - - const: ch5 - - const: ch6 - - const: ch7 - - const: ch8 - - const: ch9 - - const: ch10 - - const: ch11 - - const: ch12 - - const: ch13 - - const: ch14 - - const: ch15 + minItems: 16 + maxItems: 17 =20 clocks: items: @@ -122,6 +114,35 @@ required: allOf: - $ref: dma-controller.yaml# =20 + - if: + properties: + compatible: + contains: + enum: + - renesas,rz-dmac + - renesas,r9a09g057-dmac + then: + properties: + interrupt-names: + items: + - const: error + - const: ch0 + - const: ch1 + - const: ch2 + - const: ch3 + - const: ch4 + - const: ch5 + - const: ch6 + - const: ch7 + - const: ch8 + - const: ch9 + - const: ch10 + - const: ch11 + - const: ch12 + - const: ch13 + - const: ch14 + - const: ch15 + - if: properties: compatible: @@ -189,6 +210,49 @@ allOf: - renesas,icu - resets =20 + - if: + properties: + compatible: + contains: + const: renesas,r9a09g077-dmac + then: + properties: + reg: + maxItems: 1 + clocks: + maxItems: 1 + + clock-names: false + resets: false + reset-names: false + + interrupts: + maxItems: 16 + + interrupt-names: + items: + - const: ch0 + - const: ch1 + - const: ch2 + - const: ch3 + - const: ch4 + - const: ch5 + - const: ch6 + - const: ch7 + - const: ch8 + - const: ch9 + - const: ch10 + - const: ch11 + - const: ch12 + - const: ch13 + - const: ch14 + - const: ch15 + + required: + - clocks + - power-domains + - renesas,icu + additionalProperties: false =20 examples: --=20 2.52.0 From nobody Mon Feb 9 04:33:47 2026 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7209B332918; 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dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: 5PqvRYpgSXeutxZjwFSE4w== X-CSE-MsgGUID: fH5+xeNzRLiF8vipSL6zmw== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 05 Jan 2026 20:46:06 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.160]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 6DD8D41AF7F0; Mon, 5 Jan 2026 20:46:01 +0900 (JST) From: Cosmin Tanislav To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Cosmin Tanislav , Fabrizio Castro , Lad Prabhakar , Johan Hovold , Biju Das Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: [PATCH v4 4/4] dmaengine: sh: rz_dmac: add RZ/{T2H,N2H} support Date: Mon, 5 Jan 2026 13:44:45 +0200 Message-ID: <20260105114445.878262-5-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260105114445.878262-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20260105114445.878262-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs use a completely different ICU unit compared to RZ/V2H, which requires a separate implementation. Add support for them. RZ/N2H will use RZ/T2H as a fallback. Signed-off-by: Cosmin Tanislav Reviewed-by: Geert Uytterhoeven --- V4: * pick up Geert's Reviewed-by V3: * no changes V2: * remove notes drivers/dma/sh/rz-dmac.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index b3e38bd294b2..3dde4b006bcc 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -1075,12 +1076,18 @@ static const struct rz_dmac_info rz_dmac_v2h_info = =3D { .default_dma_req_no =3D RZV2H_ICU_DMAC_REQ_NO_DEFAULT, }; =20 +static const struct rz_dmac_info rz_dmac_t2h_info =3D { + .icu_register_dma_req =3D rzt2h_icu_register_dma_req, + .default_dma_req_no =3D RZT2H_ICU_DMAC_REQ_NO_DEFAULT, +}; + static const struct rz_dmac_info rz_dmac_generic_info =3D { .default_dma_req_no =3D 0, }; =20 static const struct of_device_id of_rz_dmac_match[] =3D { { .compatible =3D "renesas,r9a09g057-dmac", .data =3D &rz_dmac_v2h_info }, + { .compatible =3D "renesas,r9a09g077-dmac", .data =3D &rz_dmac_t2h_info }, { .compatible =3D "renesas,rz-dmac", .data =3D &rz_dmac_generic_info }, { /* Sentinel */ } }; --=20 2.52.0