Hi, Nicolas:
On Tue, 2025-12-30 at 11:03 -0300, Nícolas F. R. A. Prado wrote:
> The AFBC data payload is in fact not offset by 1 additional block as the
> code and comment suggest, and this causes the buffer to be rendered
> offset by one block. Remove this extraneous offset to get the buffer
> correctly displayed.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Fixes: c410fa9b07c3 ("drm/mediatek: Add AFBC support to Mediatek DRM driver")
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
> ---
> drivers/gpu/drm/mediatek/mtk_plane.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_plane.c b/drivers/gpu/drm/mediatek/mtk_plane.c
> index 5043e0377270..1214f623859e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_plane.c
> @@ -164,10 +164,9 @@ static void mtk_plane_update_new_state(struct drm_plane_state *new_state,
> */
> hdr_addr = addr + hdr_offset;
>
> - /* The data plane is offset by 1 additional block. */
> offset = pitch * y_offset_in_blocks +
> AFBC_DATA_BLOCK_WIDTH * AFBC_DATA_BLOCK_HEIGHT *
> - fb->format->cpp[0] * (x_offset_in_blocks + 1);
> + fb->format->cpp[0] * x_offset_in_blocks;
>
> /*
> * Using dma_addr_t variable to calculate with multiplier of different types,
>