The Glymur platform implements the eDP/DP PHY version 8.
Add the necessary registers, rework the driver to accommodate
this new version and add the Glymur specific configuration data.
This patchset depends on:
https://lore.kernel.org/r/20251224-phy-qcom-edp-add-missing-refclk-v5-0-3f45d349b5ac@oss.qualcomm.com/
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
---
Changes in v6 (resend):
- Picked up Dmitry's R-b tag for the 4th patch
- Rebased on next-20251219 (+dependency)
- Link to v6: https://lore.kernel.org/r/20251211-phy-qcom-edp-add-glymur-support-v6-0-5be5b32762b5@oss.qualcomm.com
Changes in v6:
- Added the rest of the values for the AUX_CFG arrays for v4 and v5
platforms, and re-worded the commit to explain why.
- Added proper values for the VCO_DIV for v8.
- Picked up Dmitry's R-b tag for 2nd patch
- Link to v5: https://patch.msgid.link/20251205-phy-qcom-edp-add-glymur-support-v5-0-201773966f1f@oss.qualcomm.com
Changes in v5:
- Renamed phy-qcom-qmp-dp-qserdes-com-v8.h to phy-qcom-qmp-qserdes-dp-com-v8.h,
as Dmitry suggested, and addapted the include guard.
- Added my Qualcomm OSS signed-off-by tag.
- Link to v4: https://lore.kernel.org/r/20251014-phy-qcom-edp-add-glymur-support-v3-0-2772837032ef@linaro.org
Changes in v4:
- Force fallthrough for 5400 and 8100 link rates in qcom_edp_com_configure_pll_v8,
as they use the same values.
- Picked up Rob's and Konrad's R-b tags.
- Link to v3: https://lore.kernel.org/r/20250911-phy-qcom-edp-add-glymur-support-v3-0-1c8514313a16@linaro.org
Changes in v3:
- Split the DP_AUX_CFG_SIZE change into as separate patch, as per
Konrad's request.
- Re-worded the dt-bindings commit, as per Krzysztof's request.
- Link to v2: https://lore.kernel.org/r/20250909-phy-qcom-edp-add-glymur-support-v2-0-02553381e47d@linaro.org
Changes in v2:
- Sorted alphabetically the both the compatible and v8 specific
configuration.
- Prefixed the new offsets with DP in order differentiate from PCIe ones
- Link to v1: https://lore.kernel.org/r/20250904-phy-qcom-edp-add-glymur-support-v1-0-e83c6b9a145b@linaro.org
---
Abel Vesa (4):
dt-bindings: phy: Add DP PHY compatible for Glymur
phy: qcom: edp: Fix the DP_PHY_AUX_CFG registers count
phy: qcom-qmp: qserdes-com: Add v8 DP-specific qserdes register offsets
phy: qcom: edp: Add Glymur platform support
.../devicetree/bindings/phy/qcom,edp-phy.yaml | 2 +
drivers/phy/qualcomm/phy-qcom-edp.c | 229 ++++++++++++++++++++-
.../phy/qualcomm/phy-qcom-qmp-qserdes-dp-com-v8.h | 52 +++++
3 files changed, 274 insertions(+), 9 deletions(-)
---
base-commit: f8beda16dfb950d9ec35e7a195251361e98ebea5
change-id: 20250903-phy-qcom-edp-add-glymur-support-2a8117d92b89
Best regards,
--
Abel Vesa <abel.vesa@oss.qualcomm.com>