Hi Laurent,
On 28-Dec-25 13:50, Laurent Pinchart wrote:
> On Wed, Dec 24, 2025 at 01:31:11PM +0100, Hans de Goede wrote:
>> Add a code-comment documenting the PLL chain, this is a verbatim
>> copy of Laurent's ASCII-art PLL chain from the mailinglist.
>>
>> Link: https://lore.kernel.org/linux-media/20250629204655.GA2059@pendragon.ideasonboard.com/
>> Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>> Signed-off-by: Hans de Goede <johannes.goede@oss.qualcomm.com>
>> ---
>> Suggested-by: should really be Co-authored-by since I just copy and
>> pasted Laurent's comment from the list, but that requires Laurent's S-o-B.
>>
>> Laurent can you give your S-o-B for adding a Co-authored-by ?
>
> If you insist,
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Thank you.
> but it's such a small patch that it doesn't matter much to me.
Given your request to add this to mt9m114.c, I'll just squash this into
"[PATCH v4 03/15] media: mt9m114: Use aptina-PLL helper to get PLL values"
and not add a Co-authored-by.
>
>> ---
>> Changes in v4:
>> - New patch in v4 of this series
>> ---
>> drivers/media/i2c/aptina-pll.c | 10 ++++++++++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/drivers/media/i2c/aptina-pll.c b/drivers/media/i2c/aptina-pll.c
>> index cd2ed4583c97ec87e516acfd249fdccf2f9efbb8..4a519ab587ba4cfb9945a1bb05e87a3b5e6d28c9 100644
>> --- a/drivers/media/i2c/aptina-pll.c
>> +++ b/drivers/media/i2c/aptina-pll.c
>> @@ -12,6 +12,16 @@
>>
>> #include "aptina-pll.h"
>>
>> +/*
>> + * Based on the docs the PLL is believed to have the following setup:
>> + *
>> + * +-----+ +-----+ +-----+ +-----+ +-----+
>> + * Fin --> | / N | --> | x M | --> | x 2 | --> | / P | --> | / 2 | -->
>> + * +-----+ +-----+ +-----+ +-----+ +-----+
>> + * fBit fWord fSensor
>> + * ext_clock int_clock out_clock pix_clock
>> + */
>
> I think this belongs to mt9m114.c. The other sensor that uses
> aptina-pll, MT9P031, does not include the x2 multiplier or /2 divider,
> and has no concept of fBit as it has a parallel output only.
>
> Could you please also capture that the datasheet has a constraint on
> fBit, which we translate to a constraint on out_clock for the PLL
> calculator by dividing it by 2 ?
Ack will do and as mentioned above, I'll squash this into:
[PATCH v4 03/15] media: mt9m114: Use aptina-PLL helper to get PLL values
for v5 then.
Regards,
Hans
>
>> +
>> int aptina_pll_calculate(struct device *dev,
>> const struct aptina_pll_limits *limits,
>> struct aptina_pll *pll)
>