The Trigger Generation Unit (TGU) is designed to detect patterns or
sequences within a specific region of the System on Chip (SoC). Once
configured and activated, it monitors sense inputs and can detect a
pre-programmed state or sequence across clock cycles, subsequently
producing a trigger.
TGU configuration space
offset table
x-------------------------x
| |
| |
| | Step configuration
| | space layout
| coresight management | x-------------x
| registers | |---> | |
| | | | reserve |
| | | | |
|-------------------------| | |-------------|
| | | | priority[3] |
| step[7] |<-- | |-------------|
|-------------------------| | | | priority[2] |
| | | | |-------------|
| ... | |Steps region | | priority[1] |
| | | | |-------------|
|-------------------------| | | | priority[0] |
| |<-- | |-------------|
| step[0] |--------------------> | |
|-------------------------| | condition |
| | | |
| control and status | x-------------x
| space | | |
x-------------------------x |Timer/Counter|
| |
x-------------x
TGU Configuration in Hardware
The TGU provides a step region for user configuration, similar
to a flow chart. Each step region consists of three register clusters:
1.Priority Region: Sets the required signals with priority.
2.Condition Region: Defines specific requirements (e.g., signal A
reaches three times) and the subsequent action once the requirement is
met.
3.Timer/Counter (Optional): Provides timing or counting functionality.
Add a new tgu.yaml file to describe the bindings required to
define the TGU in the device trees.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Songwei Chai <songwei.chai@oss.qualcomm.com>
---
.../devicetree/bindings/arm/qcom,tgu.yaml | 92 +++++++++++++++++++
1 file changed, 92 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/qcom,tgu.yaml
diff --git a/Documentation/devicetree/bindings/arm/qcom,tgu.yaml b/Documentation/devicetree/bindings/arm/qcom,tgu.yaml
new file mode 100644
index 000000000000..5b6a58ebe691
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,tgu.yaml
@@ -0,0 +1,92 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+# Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom,tgu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Trigger Generation Unit - TGU
+
+description: |
+ The Trigger Generation Unit (TGU) is a Data Engine which can be utilized
+ to sense a plurality of signals and create a trigger into the CTI or
+ generate interrupts to processors. The TGU is like the trigger circuit
+ of a Logic Analyzer. The corresponding trigger logic can be realized by
+ configuring the conditions for each step after sensing the signal.
+ Once setup and enabled, it will observe sense inputs and based upon
+ the activity of those inputs, even over clock cycles, may detect a
+ preprogrammed state/sequence and then produce a trigger or interrupt.
+
+ The primary use case of the TGU is to detect patterns or sequences on a
+ given set of signals within some region to identify the issue in time
+ once there is abnormal behavior in the subsystem.
+
+maintainers:
+ - Mao Jinlong <jinlong.mao@oss.qualcomm.com>
+ - Songwei Chai <songwei.chai@oss.qualcomm.com>
+
+# Need a custom select here or 'arm,primecell' will match on lots of nodes
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,tgu
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - const: qcom,tgu
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: apb_pclk
+
+ in-ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ additionalProperties: false
+
+ properties:
+ port:
+ description:
+ The port mechanism here ensures the relationship between TGU and
+ TPDM, as TPDM is one of the inputs for TGU. It will allow TGU to
+ function as TPDM's helper and enable TGU when the connected
+ TPDM is enabled.
+ $ref: /schemas/graph.yaml#/properties/port
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ tgu@10b0e000 {
+ compatible = "qcom,tgu", "arm,primecell";
+ reg = <0x10b0e000 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ tgu_in_tpdm_swao: endpoint{
+ remote-endpoint = <&tpdm_swao_out_tgu>;
+ };
+ };
+ };
+ };
+...
--
2.34.1
On 12/19/2025 2:58 PM, Songwei Chai wrote:
> The Trigger Generation Unit (TGU) is designed to detect patterns or
> sequences within a specific region of the System on Chip (SoC). Once
> configured and activated, it monitors sense inputs and can detect a
> pre-programmed state or sequence across clock cycles, subsequently
> producing a trigger.
>
> TGU configuration space
> offset table
> x-------------------------x
> | |
> | |
> | | Step configuration
> | | space layout
> | coresight management | x-------------x
> | registers | |---> | |
> | | | | reserve |
> | | | | |
> |-------------------------| | |-------------|
> | | | | priority[3] |
> | step[7] |<-- | |-------------|
> |-------------------------| | | | priority[2] |
> | | | | |-------------|
> | ... | |Steps region | | priority[1] |
> | | | | |-------------|
> |-------------------------| | | | priority[0] |
> | |<-- | |-------------|
> | step[0] |--------------------> | |
> |-------------------------| | condition |
> | | | |
> | control and status | x-------------x
> | space | | |
> x-------------------------x |Timer/Counter|
> | |
> x-------------x
> TGU Configuration in Hardware
>
> The TGU provides a step region for user configuration, similar
> to a flow chart. Each step region consists of three register clusters:
>
> 1.Priority Region: Sets the required signals with priority.
> 2.Condition Region: Defines specific requirements (e.g., signal A
> reaches three times) and the subsequent action once the requirement is
> met.
> 3.Timer/Counter (Optional): Provides timing or counting functionality.
>
> Add a new tgu.yaml file to describe the bindings required to
> define the TGU in the device trees.
>
> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> Signed-off-by: Songwei Chai <songwei.chai@oss.qualcomm.com>
> ---
> .../devicetree/bindings/arm/qcom,tgu.yaml | 92 +++++++++++++++++++
> 1 file changed, 92 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/qcom,tgu.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom,tgu.yaml b/Documentation/devicetree/bindings/arm/qcom,tgu.yaml
> new file mode 100644
> index 000000000000..5b6a58ebe691
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/qcom,tgu.yaml
> @@ -0,0 +1,92 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +# Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/qcom,tgu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Trigger Generation Unit - TGU
> +
> +description: |
> + The Trigger Generation Unit (TGU) is a Data Engine which can be utilized
> + to sense a plurality of signals and create a trigger into the CTI or
> + generate interrupts to processors. The TGU is like the trigger circuit
> + of a Logic Analyzer. The corresponding trigger logic can be realized by
> + configuring the conditions for each step after sensing the signal.
> + Once setup and enabled, it will observe sense inputs and based upon
> + the activity of those inputs, even over clock cycles, may detect a
> + preprogrammed state/sequence and then produce a trigger or interrupt.
> +
> + The primary use case of the TGU is to detect patterns or sequences on a
> + given set of signals within some region to identify the issue in time
> + once there is abnormal behavior in the subsystem.
> +
> +maintainers:
> + - Mao Jinlong <jinlong.mao@oss.qualcomm.com>
> + - Songwei Chai <songwei.chai@oss.qualcomm.com>
> +
> +# Need a custom select here or 'arm,primecell' will match on lots of nodes
> +select:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,tgu
> + required:
> + - compatible
> +
> +properties:
> + compatible:
> + items:
> + - const: qcom,tgu
> + - const: arm,primecell
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: apb_pclk
> +
> + in-ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + additionalProperties: false
> +
> + properties:
> + port:
> + description:
> + The port mechanism here ensures the relationship between TGU and
> + TPDM, as TPDM is one of the inputs for TGU. It will allow TGU to
> + function as TPDM's helper and enable TGU when the connected
> + TPDM is enabled.
> + $ref: /schemas/graph.yaml#/properties/port
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + tgu@10b0e000 {
> + compatible = "qcom,tgu", "arm,primecell";
> + reg = <0x10b0e000 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + tgu_in_tpdm_swao: endpoint{
> + remote-endpoint = <&tpdm_swao_out_tgu>;
> + };
> + };
> + };
In Coresight driver, the helper device is enabled via enable_path, but
for TGU, it's enabling via sysfs node manually, so why do we need
connect the tgu with TPDM device? I didnt see the connection with
Coresight Core framework.
Thanks,
Jie
> + };
> +...
On 12/19/2025 2:58 PM, Songwei Chai wrote:
> The Trigger Generation Unit (TGU) is designed to detect patterns or
> sequences within a specific region of the System on Chip (SoC). Once
> configured and activated, it monitors sense inputs and can detect a
> pre-programmed state or sequence across clock cycles, subsequently
> producing a trigger.
>
> TGU configuration space
> offset table
> x-------------------------x
> | |
> | |
> | | Step configuration
> | | space layout
> | coresight management | x-------------x
> | registers | |---> | |
> | | | | reserve |
> | | | | |
> |-------------------------| | |-------------|
> | | | | priority[3] |
> | step[7] |<-- | |-------------|
> |-------------------------| | | | priority[2] |
> | | | | |-------------|
> | ... | |Steps region | | priority[1] |
> | | | | |-------------|
> |-------------------------| | | | priority[0] |
> | |<-- | |-------------|
> | step[0] |--------------------> | |
> |-------------------------| | condition |
> | | | |
> | control and status | x-------------x
> | space | | |
> x-------------------------x |Timer/Counter|
> | |
> x-------------x
> TGU Configuration in Hardware
>
> The TGU provides a step region for user configuration, similar
> to a flow chart. Each step region consists of three register clusters:
>
> 1.Priority Region: Sets the required signals with priority.
> 2.Condition Region: Defines specific requirements (e.g., signal A
> reaches three times) and the subsequent action once the requirement is
> met.
> 3.Timer/Counter (Optional): Provides timing or counting functionality.
>
> Add a new tgu.yaml file to describe the bindings required to
> define the TGU in the device trees.
>
> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> Signed-off-by: Songwei Chai <songwei.chai@oss.qualcomm.com>
> ---
> .../devicetree/bindings/arm/qcom,tgu.yaml | 92 +++++++++++++++++++
> 1 file changed, 92 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/qcom,tgu.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom,tgu.yaml b/Documentation/devicetree/bindings/arm/qcom,tgu.yaml
> new file mode 100644
> index 000000000000..5b6a58ebe691
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/qcom,tgu.yaml
> @@ -0,0 +1,92 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +# Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
Thanks,
Jie
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/qcom,tgu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Trigger Generation Unit - TGU
> +
> +description: |
> + The Trigger Generation Unit (TGU) is a Data Engine which can be utilized
> + to sense a plurality of signals and create a trigger into the CTI or
> + generate interrupts to processors. The TGU is like the trigger circuit
> + of a Logic Analyzer. The corresponding trigger logic can be realized by
> + configuring the conditions for each step after sensing the signal.
> + Once setup and enabled, it will observe sense inputs and based upon
> + the activity of those inputs, even over clock cycles, may detect a
> + preprogrammed state/sequence and then produce a trigger or interrupt.
> +
> + The primary use case of the TGU is to detect patterns or sequences on a
> + given set of signals within some region to identify the issue in time
> + once there is abnormal behavior in the subsystem.
> +
> +maintainers:
> + - Mao Jinlong <jinlong.mao@oss.qualcomm.com>
> + - Songwei Chai <songwei.chai@oss.qualcomm.com>
> +
> +# Need a custom select here or 'arm,primecell' will match on lots of nodes
> +select:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,tgu
> + required:
> + - compatible
> +
> +properties:
> + compatible:
> + items:
> + - const: qcom,tgu
> + - const: arm,primecell
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: apb_pclk
> +
> + in-ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + additionalProperties: false
> +
> + properties:
> + port:
> + description:
> + The port mechanism here ensures the relationship between TGU and
> + TPDM, as TPDM is one of the inputs for TGU. It will allow TGU to
> + function as TPDM's helper and enable TGU when the connected
> + TPDM is enabled.
> + $ref: /schemas/graph.yaml#/properties/port
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + tgu@10b0e000 {
> + compatible = "qcom,tgu", "arm,primecell";
> + reg = <0x10b0e000 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + tgu_in_tpdm_swao: endpoint{
> + remote-endpoint = <&tpdm_swao_out_tgu>;
> + };
> + };
> + };
> + };
> +...
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