From: Biju Das <biju.das.jz@bp.renesas.com>
Enable device rsci{2,4,9} nodes for the RZ/G3E SMARC EVK.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
v1->v2:
* Rearranged pincrl entries order by port number.
* Updated the comments to reflect the board signals.
* Added missing pins CTS4N and RTS4N.
* rsci2 is guarded by macros SW_SER2_EN and SW_SER0_PMOD.
* rsci4 is guarded by macros SW_LCD_EN and SW_SER0_PMOD.
* rsci9 is guarded by macro SW_LCD_EN.
* Added uart-has-rtscts to rsci4.
* Dropped rsci{2,4,9} nodes from renesas-smarc2.dtsi as RZ/G3S does not
have RSCI interfaces.
---
.../boot/dts/renesas/r9a09g047e57-smarc.dts | 58 +++++++++++++++++++
.../boot/dts/renesas/renesas-smarc2.dtsi | 7 +++
.../boot/dts/renesas/rzg3e-smarc-som.dtsi | 4 ++
3 files changed, 69 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
index 50e075745474..696903dc7a63 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
+++ b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts
@@ -12,6 +12,8 @@
#define SW_GPIO9_CAN1_STB 0
#define SW_LCD_EN 0
#define SW_PDM_EN 0
+#define SW_SER0_PMOD 1
+#define SW_SER2_EN 1
#define SW_SD0_DEV_SEL 0
#define SW_SDIO_M2E 0
@@ -37,6 +39,9 @@ / {
aliases {
i2c0 = &i2c0;
+ serial0 = &rsci4;
+ serial1 = &rsci9;
+ serial2 = &rsci2;
serial3 = &scif0;
mmc1 = &sdhi1;
};
@@ -140,6 +145,28 @@ nmi_pins: nmi {
input-schmitt-enable;
};
+ rsci2_pins: rsci2 {
+ pinmux = <RZG3E_PORT_PINMUX(1, 0, 1)>, /* RXD2 */
+ <RZG3E_PORT_PINMUX(1, 1, 1)>, /* TXD2 */
+ <RZG3E_PORT_PINMUX(1, 2, 6)>, /* CTS2N */
+ <RZG3E_PORT_PINMUX(1, 3, 1)>; /* RTS2N */
+ bias-pull-up;
+ };
+
+ rsci4_pins: rsci4 {
+ pinmux = <RZG3E_PORT_PINMUX(7, 6, 5)>, /* RXD4 */
+ <RZG3E_PORT_PINMUX(7, 7, 5)>, /* TXD4 */
+ <RZG3E_PORT_PINMUX(8, 0, 6)>, /* CTS4N */
+ <RZG3E_PORT_PINMUX(8, 1, 5)>; /* RTS4N */
+ bias-pull-up;
+ };
+
+ rsci9_pins: rsci9 {
+ pinmux = <RZG3E_PORT_PINMUX(8, 2, 5)>, /* RXD9 */
+ <RZG3E_PORT_PINMUX(8, 3, 5)>; /* TXD9 */
+ bias-pull-up;
+ };
+
scif_pins: scif {
pins = "SCIF_TXD", "SCIF_RXD";
renesas,output-impedance = <1>;
@@ -176,6 +203,37 @@ usb3_pins: usb3 {
};
};
+#if SW_SER0_PMOD && SW_SER2_EN
+&rsci2 {
+ pinctrl-0 = <&rsci2_pins>;
+ pinctrl-names = "default";
+
+ uart-has-rtscts;
+
+ status = "okay";
+};
+#endif
+
+#if (!SW_LCD_EN) && (SW_SER0_PMOD)
+&rsci4 {
+ pinctrl-0 = <&rsci4_pins>;
+ pinctrl-names = "default";
+
+ uart-has-rtscts;
+
+ status = "okay";
+};
+#endif
+
+#if (!SW_LCD_EN)
+&rsci9 {
+ pinctrl-0 = <&rsci9_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+#endif
+
&scif0 {
pinctrl-0 = <&scif_pins>;
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
index a6e8eb730096..b607b5d6c259 100644
--- a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
+++ b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi
@@ -13,6 +13,13 @@
* 0 - SMARC SDIO signal is connected to uSD1
* 1 - SMARC SDIO signal is connected to M.2 Key E connector
*
+ * Please set the switch position SW_OPT_MUX.4 on the carrier board and the
+ * corresponding macro SW_SER0_PMOD on the board DTS:
+ *
+ * SW_SER0_PMOD:
+ * 0 - SER0 signals connect to M.2 Key-E, SER2 signals are unconnected
+ * 1 - SER0 signals connect to PMOD, SER2 signals connect to M.2 Key-E
+ *
* Please set the switch position SW_GPIO_CAN_PMOD on the carrier board and the
* corresponding macro SW_GPIO8_CAN0_STB/SW_GPIO8_CAN0_STB on the board DTS:
*
diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
index 7faa44510d98..eb0de21d6716 100644
--- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
@@ -13,6 +13,10 @@
* 0 - SD0 is connected to eMMC (default)
* 1 - SD0 is connected to uSD0 card
*
+ * Switch position SYS.4, Macro SW_SER2_EN:
+ * 0 - Select Module DSI connector(GPIO)
+ * 1 - Select SER2
+ *
* Switch position SYS.5, Macro SW_LCD_EN:
* 0 - Select Misc. Signals routing
* 1 - Select LCD
--
2.43.0
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