On Tuesday, November 25, 2025 9:05 PM Svyatoslav Ryhel wrote:
> Remove current emc and emc_mux clocks and replace them with the proper EMC
> clock implementation for correct EMC driver support.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
> drivers/clk/tegra/clk-tegra114.c | 39 ++++++++++++++++++++------------
> 1 file changed, 25 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
> index 8bde72aa5e68..853ef707654a 100644
> --- a/drivers/clk/tegra/clk-tegra114.c
> +++ b/drivers/clk/tegra/clk-tegra114.c
> @@ -622,10 +622,6 @@ static const char *mux_plld_out0_plld2_out0[] = {
> };
> #define mux_plld_out0_plld2_out0_idx NULL
>
> -static const char *mux_pllmcp_clkm[] = {
> - "pll_m_out0", "pll_c_out0", "pll_p_out0", "clk_m", "pll_m_ud",
> -};
> -
> static const struct clk_div_table pll_re_div_table[] = {
> { .val = 0, .div = 1 },
> { .val = 1, .div = 2 },
> @@ -672,7 +668,6 @@ static struct tegra_clk tegra114_clks[tegra_clk_max] __initdata = {
> [tegra_clk_csi] = { .dt_id = TEGRA114_CLK_CSI, .present = true },
> [tegra_clk_i2c2] = { .dt_id = TEGRA114_CLK_I2C2, .present = true },
> [tegra_clk_uartc] = { .dt_id = TEGRA114_CLK_UARTC, .present = true },
> - [tegra_clk_emc] = { .dt_id = TEGRA114_CLK_EMC, .present = true },
> [tegra_clk_usb2] = { .dt_id = TEGRA114_CLK_USB2, .present = true },
> [tegra_clk_usb3] = { .dt_id = TEGRA114_CLK_USB3, .present = true },
> [tegra_clk_vde_8] = { .dt_id = TEGRA114_CLK_VDE, .present = true },
> @@ -1048,14 +1043,7 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base,
> 0, 82, periph_clk_enb_refcnt);
> clks[TEGRA114_CLK_DSIB] = clk;
>
> - /* emc mux */
> - clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm,
> - ARRAY_SIZE(mux_pllmcp_clkm),
> - CLK_SET_RATE_NO_REPARENT,
> - clk_base + CLK_SOURCE_EMC,
> - 29, 3, 0, &emc_lock);
> -
> - clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC,
> + clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC,
> &emc_lock);
> clks[TEGRA114_CLK_MC] = clk;
>
> @@ -1321,6 +1309,26 @@ static int tegra114_reset_deassert(unsigned long id)
> return 0;
> }
>
> +static struct clk *tegra114_clk_src_onecell_get(struct of_phandle_args *clkspec,
> + void *data)
> +{
> + struct clk_hw *hw;
> + struct clk *clk;
> +
> + clk = of_clk_src_onecell_get(clkspec, data);
> + if (IS_ERR(clk))
> + return clk;
> +
> + hw = __clk_get_hw(clk);
> +
> + if (clkspec->args[0] == TEGRA114_CLK_EMC) {
> + if (!tegra124_clk_emc_driver_available(hw))
> + return ERR_PTR(-EPROBE_DEFER);
> + }
> +
> + return clk;
> +}
> +
> static void __init tegra114_clock_init(struct device_node *np)
> {
> struct device_node *node;
> @@ -1368,7 +1376,10 @@ static void __init tegra114_clock_init(struct device_node *np)
> tegra_init_special_resets(1, tegra114_reset_assert,
> tegra114_reset_deassert);
>
> - tegra_add_of_provider(np, of_clk_src_onecell_get);
> + tegra_add_of_provider(np, tegra114_clk_src_onecell_get);
> + clks[TEGRA114_CLK_EMC] = tegra124_clk_register_emc(clk_base, np,
> + &emc_lock);
> +
> tegra_register_devclks(devclks, ARRAY_SIZE(devclks));
>
> tegra_clk_apply_init_table = tegra114_clock_apply_init_table;
>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>