The implementer mask defined in the driver [1] captures bits 0-10,
whereas section C.4.2 of BSA specification [2] indicates that bits
0-11 of the W_IIDR register represent the implementer JEP106 code.
Update the SBSA_GWDT_IMPL_MASK corresponding to bits 0-11, while
at it update SBSA_GWDT_VERSION_MASK mask to use GENMASK.

[1] #define SBSA_GWDT_IMPL_MASK    0x7FF

[2] Implementer, bits [11:0]
Contains the JEP106 code of the company that implemented the
Generic Watchdog:
Bits[11:8] The JEP106 continuation code of the implementer.
Bit[7] Always 0
Bits [6:0] The JEP106 identity code of the implementer.

Signed-off-by: Naina Mehta <naina.mehta@oss.qualcomm.com>
Acked-by: Aaron Plattner <aplattner@nvidia.com>
---
* Link to RFC: https://lore.kernel.org/all/20251104063937.839138-1-naina.mehta@oss.qualcomm.com/

 drivers/watchdog/sbsa_gwdt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c
index 6ce1bfb39064..f7cdc277eb3f 100644
--- a/drivers/watchdog/sbsa_gwdt.c
+++ b/drivers/watchdog/sbsa_gwdt.c
@@ -72,10 +72,10 @@
 #define SBSA_GWDT_WCS_WS0	BIT(1)
 #define SBSA_GWDT_WCS_WS1	BIT(2)
 
-#define SBSA_GWDT_VERSION_MASK  0xF
+#define SBSA_GWDT_VERSION_MASK  GENMASK(3, 0)
 #define SBSA_GWDT_VERSION_SHIFT 16
 
-#define SBSA_GWDT_IMPL_MASK	0x7FF
+#define SBSA_GWDT_IMPL_MASK	GENMASK(11, 0)
 #define SBSA_GWDT_IMPL_SHIFT	0
 #define SBSA_GWDT_IMPL_MEDIATEK	0x426
 
-- 
2.34.1

On 11/20/25 22:14, Naina Mehta wrote:
> The implementer mask defined in the driver [1] captures bits 0-10,
> whereas section C.4.2 of BSA specification [2] indicates that bits
> 0-11 of the W_IIDR register represent the implementer JEP106 code.
> Update the SBSA_GWDT_IMPL_MASK corresponding to bits 0-11, while
> at it update SBSA_GWDT_VERSION_MASK mask to use GENMASK.
> 
> [1] #define SBSA_GWDT_IMPL_MASK    0x7FF
> 
> [2] Implementer, bits [11:0]
> Contains the JEP106 code of the company that implemented the
> Generic Watchdog:
> Bits[11:8] The JEP106 continuation code of the implementer.
> Bit[7] Always 0
> Bits [6:0] The JEP106 identity code of the implementer.
> 
> Signed-off-by: Naina Mehta <naina.mehta@oss.qualcomm.com>
> Acked-by: Aaron Plattner <aplattner@nvidia.com>

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

> ---
> * Link to RFC: https://lore.kernel.org/all/20251104063937.839138-1-naina.mehta@oss.qualcomm.com/
> 
>   drivers/watchdog/sbsa_gwdt.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c
> index 6ce1bfb39064..f7cdc277eb3f 100644
> --- a/drivers/watchdog/sbsa_gwdt.c
> +++ b/drivers/watchdog/sbsa_gwdt.c
> @@ -72,10 +72,10 @@
>   #define SBSA_GWDT_WCS_WS0	BIT(1)
>   #define SBSA_GWDT_WCS_WS1	BIT(2)
>   
> -#define SBSA_GWDT_VERSION_MASK  0xF
> +#define SBSA_GWDT_VERSION_MASK  GENMASK(3, 0)
>   #define SBSA_GWDT_VERSION_SHIFT 16
>   
> -#define SBSA_GWDT_IMPL_MASK	0x7FF
> +#define SBSA_GWDT_IMPL_MASK	GENMASK(11, 0)
>   #define SBSA_GWDT_IMPL_SHIFT	0
>   #define SBSA_GWDT_IMPL_MEDIATEK	0x426
>