[PATCH v6 0/2] genirq: s390/pci: Migrate MSI interrupts to irqdomain API

Tobias Schumacher posted 2 patches 1 week, 3 days ago
There is a newer version of this series
arch/s390/Kconfig           |   1 +
arch/s390/include/asm/pci.h |   4 +
arch/s390/pci/pci_bus.c     |  18 ++-
arch/s390/pci/pci_irq.c     | 304 ++++++++++++++++++++++++++++----------------
include/linux/irqdesc.h     |   6 +-
kernel/irq/irqdesc.c        |   6 +-
6 files changed, 218 insertions(+), 121 deletions(-)
[PATCH v6 0/2] genirq: s390/pci: Migrate MSI interrupts to irqdomain API
Posted by Tobias Schumacher 1 week, 3 days ago
This patch series reworks the PCIe interrupt handling on s390 by
migrating it to use a proper MSI parent domain. Introducing a dedicated
MSI domain hierarchy aligns s390 PCIe support with the generic Linux IRQ
domain model. Currently s390 is one of the last architectures still using
the legacy API.

The migration splits the existing code in the legacy functions
arch_setup_msi_irqs() and arch_teardown_msi_irqs() into different
callbacks of the newly created MSI parent domain:

- zpci_msi_prepare(): prepare the allocation of per-device MSI IRQs.
      will be called once for each device before allocating individual
      IRQs and sets up for example the adapter aisb and aibv.
- zpci_msi_teardown(): reverts the effects of zpci_msi_prepare() and is
      called after all MSI IRQs are freed.
- zpci_msi_domain_alloc(): the allocation function for interrupts
- zpci_msi_domain_free(): revert the effects of zpci_msi_domain_alloc()
- zpci_compose_msi_msg(): create the MSI message to be written into the
      corresponding PCI config space.

* Patch 1 fixes an inconsistency in the irqdomain API. Internally, hw
  irqs are represented by an unsigned long int (irq_hw_number_t) while
  the external API in some cases takes an unsigned int as parameter.
  This fix was required in V2 of the patchset. Due to conceptual changes
  in patch 2 it is not required anymore for s390, but still seems
  sensible.
* Patch 2 implements IRQ domains for s390 PCI

Since patch 1 changes common APIs, some build tests were done for x86_64
and arm64. 

Signed-off-by: Tobias Schumacher <ts@linux.ibm.com>
---
Changes in v6:
- removed obsolete function zpci_decode_hwirq_msi_index()
- removed some code duplication
- fixed some coding style issues
- corrected hwirq encoding in commit message
- Link to v5: https://lore.kernel.org/r/20251121-implement-msi-domain-v5-0-d7e717dfd3f7@linux.ibm.com

Changes in v5:
- removed two lines of superfluous code
- Link to v4: https://lore.kernel.org/r/20251120-implement-msi-domain-v4-0-a01be58e158a@linux.ibm.com

Changes in v4:
- remove flag MSI_FLAG_PCI_MSI_MASK_PARENT and mask/unmask callbacks
- use goto statements in zpci_bus_create_pci_bus()
- Link to v3: https://lore.kernel.org/r/20251118-implement-msi-domain-v3-0-6fe8feb2a93f@linux.ibm.com

Changes in v3:
- implement one MSI parent domain per PCI domain to further align the
  implementation with other architectures.
- Link to v2: https://lore.kernel.org/r/20251117-implement-msi-domain-v2-0-a110ea0721fe@linux.ibm.com

Changes in v2:
- fix directed interrupt setup and handling
- add flag MSI_FLAG_NO_AFFINITY in case of floating interrupts
- style adjustments according to review comments
- Link to v1: https://lore.kernel.org/r/20251112-implement-msi-domain-v1-0-103dd123de14@linux.ibm.com

---
Tobias Schumacher (2):
      genirq: Change hwirq parameter to irq_hw_number_t
      s390/pci: Migrate s390 IRQ logic to IRQ domain API

 arch/s390/Kconfig           |   1 +
 arch/s390/include/asm/pci.h |   4 +
 arch/s390/pci/pci_bus.c     |  18 ++-
 arch/s390/pci/pci_irq.c     | 304 ++++++++++++++++++++++++++++----------------
 include/linux/irqdesc.h     |   6 +-
 kernel/irq/irqdesc.c        |   6 +-
 6 files changed, 218 insertions(+), 121 deletions(-)
---
base-commit: 82ef9f0fac73cca3e7d776b095b5a7de1b0b88fc
change-id: 20251104-implement-msi-domain-dc1ea014580e

Best regards,
-- 
Tobias Schumacher <ts@linux.ibm.com>
Re: [PATCH v6 0/2] genirq: s390/pci: Migrate MSI interrupts to irqdomain API
Posted by Gerd Bayer 1 week ago
On Fri, 2025-11-21 at 16:45 +0100, Tobias Schumacher wrote:
> This patch series reworks the PCIe interrupt handling on s390 by
> migrating it to use a proper MSI parent domain. Introducing a dedicated
> MSI domain hierarchy aligns s390 PCIe support with the generic Linux IRQ
> domain model. Currently s390 is one of the last architectures still using
> the legacy API.
> 
> The migration splits the existing code in the legacy functions
> arch_setup_msi_irqs() and arch_teardown_msi_irqs() into different
> callbacks of the newly created MSI parent domain:
> 
> - zpci_msi_prepare(): prepare the allocation of per-device MSI IRQs.
>       will be called once for each device before allocating individual
>       IRQs and sets up for example the adapter aisb and aibv.
> - zpci_msi_teardown(): reverts the effects of zpci_msi_prepare() and is
>       called after all MSI IRQs are freed.
> - zpci_msi_domain_alloc(): the allocation function for interrupts
> - zpci_msi_domain_free(): revert the effects of zpci_msi_domain_alloc()
> - zpci_compose_msi_msg(): create the MSI message to be written into the
>       corresponding PCI config space.
> 
> * Patch 1 fixes an inconsistency in the irqdomain API. Internally, hw
>   irqs are represented by an unsigned long int (irq_hw_number_t) while
>   the external API in some cases takes an unsigned int as parameter.
>   This fix was required in V2 of the patchset. Due to conceptual changes
>   in patch 2 it is not required anymore for s390, but still seems
>   sensible.
> * Patch 2 implements IRQ domains for s390 PCI
> 
> Since patch 1 changes common APIs, some build tests were done for x86_64
> and arm64. 
> 

I just ran some error inject test on mxl5_core on a z15 zVM system with
`zpcictl --reset-fw <PCI-ID>`

With your patch series PCI autorecovery does not finish, unfortunately.
Instead HW presents an Event 0x10 (MSI was received from the PCI
function, while no AIRQ was registered)

I'm afraid, there might be more work required...
Gerd
Re: [PATCH v6 0/2] genirq: s390/pci: Migrate MSI interrupts to irqdomain API
Posted by Tobias Schumacher 1 week ago
On Mon Nov 24, 2025 at 11:30 AM CET, Gerd Bayer wrote:
> On Fri, 2025-11-21 at 16:45 +0100, Tobias Schumacher wrote:
>> This patch series reworks the PCIe interrupt handling on s390 by
>> migrating it to use a proper MSI parent domain. Introducing a dedicated
>> MSI domain hierarchy aligns s390 PCIe support with the generic Linux IRQ
>> domain model. Currently s390 is one of the last architectures still using
>> the legacy API.
>> 
>> The migration splits the existing code in the legacy functions
>> arch_setup_msi_irqs() and arch_teardown_msi_irqs() into different
>> callbacks of the newly created MSI parent domain:
>> 
>> - zpci_msi_prepare(): prepare the allocation of per-device MSI IRQs.
>>       will be called once for each device before allocating individual
>>       IRQs and sets up for example the adapter aisb and aibv.
>> - zpci_msi_teardown(): reverts the effects of zpci_msi_prepare() and is
>>       called after all MSI IRQs are freed.
>> - zpci_msi_domain_alloc(): the allocation function for interrupts
>> - zpci_msi_domain_free(): revert the effects of zpci_msi_domain_alloc()
>> - zpci_compose_msi_msg(): create the MSI message to be written into the
>>       corresponding PCI config space.
>> 
>> * Patch 1 fixes an inconsistency in the irqdomain API. Internally, hw
>>   irqs are represented by an unsigned long int (irq_hw_number_t) while
>>   the external API in some cases takes an unsigned int as parameter.
>>   This fix was required in V2 of the patchset. Due to conceptual changes
>>   in patch 2 it is not required anymore for s390, but still seems
>>   sensible.
>> * Patch 2 implements IRQ domains for s390 PCI
>> 
>> Since patch 1 changes common APIs, some build tests were done for x86_64
>> and arm64. 
>> 
>
> I just ran some error inject test on mxl5_core on a z15 zVM system with
> `zpcictl --reset-fw <PCI-ID>`
>
> With your patch series PCI autorecovery does not finish, unfortunately.
> Instead HW presents an Event 0x10 (MSI was received from the PCI
> function, while no AIRQ was registered)
>
> I'm afraid, there might be more work required...
> Gerd

Thanks, I'll have a look.

Tobias